Enhancement mode III-N HEMTs

A III-N semiconductor device comprising:

• a nitride channel layer including a first channel region beneath a gate region, and two channel access regions on opposite sides of the first channel region, the composition of the nitride channel layer being selected from the group consisting of nitrides of gallium, indium and aluminum, and combinations thereof;
• a first AlXN layer adjacent the channel layer wherein X is selected from the group consisting of gallium, indium or their combination;
• a second AlXN layer adjacent the first AlXN layer in the areas adjacent to the channel access regions, but not in the area adjacent to the first channel region, the first AlXN layer having a substantially higher concentration of Al than the second AlXN layer;
• the concentration of Al in each of the first and second AlXN layers, respectively, and their respective thicknesses being selected to induce a 2DEG charge in channel access regions adjacent the first AlXN layer without inducing any substantial 2DEG charge in the first channel region, so that the channel is not conductive in the absence of a switching voltage applied to the gate region, but is conductive when a switching voltage greater than a threshold voltage is applied to the gate region.

A III-N semiconductor device comprising:

• a nitride channel layer including a first channel region beneath a gate region, and two channel access regions on opposite sides of the first channel region, the composition of the nitride channel layer being selected from the group consisting of nitrides of gallium, indium and aluminum, and combinations thereof;
• a first AlXN layer adjacent the channel layer wherein X is selected from the group consisting of gallium, indium or their combination;
• a second AlXN layer adjacent the first AlXN layer, the first AlXN layer having a substantially higher concentration of Al than the second AlXN layer;
• a gate region formed in the second AlXN layer, the gate region comprising an aperture in the second AlXN layer and an insulator covering at least part of the aperture;
• and
• a conductive gate contact atop the insulator and insulated from the first and second AlXN layers;
• wherein
• the concentration of Al in each of the first and second AlXN layers, respectively, and their respective thicknesses being selected to induce a 2DEG charge in channel access regions adjacent the first AlXN layer without inducing any substantial 2DEG charge in the first channel region, so that the channel is not conductive in the absence of a switching voltage applied to the gate region, but is conductive when a switching voltage greater than a threshold voltage is applied to the gate region.

A GaN semiconductor device comprising:

• a GaN channel layer, including a first channel region beneath a gate region, and two channel access regions on opposite sides of the first channel region;
• a layer of AlxGaN on the channel layer, where x is between about 0.05 and 0.3;
• an n-doped GaN layer adjacent the AlxGaN layer in the areas adjacent to the channel access regions, but not in the area adjacent to the first channel region;
• the concentration of Al in the AlxGaN layer, the AlxGaN layer thickness and the n-doping concentration in the n-doped GaN layer being selected to induce a 2DEG charge in channel access regions adjacent the AlxGaN layer without inducing any substantial 2DEG charge in the first channel region, so that the channel is not conductive in the absence of a switching voltage applied to the gate region, but can readily become conductive when a switching voltage greater than a threshold voltage is applied to the gate region.

A III-N semiconductor device comprising:

• a gate in a recessed gate region;
• a nitride channel layer including a first channel region beneath the recessed gate region, the composition of the nitride channel layer being selected from the group consisting of nitrides of gallium, indium and aluminum, and combinations thereof;
• an AlXN layer adjacent the channel layer wherein X is selected from the group consisting of gallium, indium or their combination;
• a III-N layer adjacent the AlXN layer and surrounding the recessed gate region, the III-N layer including two channel access regions on opposite sides of the first channel region respectively connected to a source and a drain,
• an AlmYN layer adjacent to the III-N layer and surrounding the recessed gate region, wherein Y is selected from the group consisting of gallium, indium or their combination, the concentration m of Al in the AlmYN layer and its thickness being selected to induce a 2DEG charge in the two channel access regions,
• the first channel region being non-conductive in the absence of a switching voltage applied to the gate, but being conductive in the presence of a gate voltage greater than a threshold voltage, creating a 2DEG region in the first channel region and through a gate-induced, substantially vertical conducting region through the AlXN layer, thereby completing the conduction path through the access regions from the source to the drain.

A III-N semiconductor device comprising:

• a nitride channel layer including a first channel region beneath a recessed gate region, the composition of the nitride channel layer being selected from the group consisting of nitrides of gallium, indium and aluminum, and combinations thereof;
• a III-N layer adjacent the nitride channel layer and surrounding the recessed gate region, the III-N layer including two channel access regions on opposite sides of the first channel region and respectively connected to a source and a drain,
• an AlmYN layer adjacent to the III-N layer and surrounding the recessed gate region, wherein Y is selected from the group consisting of gallium, indium or their combination,
• the first channel region being non-conductive in the absence of a switching voltage applied to the gate, but being conductive in the presence of a switching voltage greater than a threshold voltage applied to the gate, creating a 2DEG region in the first channel region and through a gate-induced, substantially vertical conducting region through the III-N layer, thereby completing the conduction path through the two channel access regions, the first channel region and the vertical conducting region from the source to the drain.