Performance driven layout optimization using morphing of a basis set of representative layouts

An apparatus for generating at least one variant layout for a cell design, the apparatus comprising:

• a memory;
• and
• at least one processor device, coupled to the memory, operative to:
• obtain at least a first basis layout and a second basis layout for the cell design, wherein the first basis layout and the second basis layout each comprises a plurality of shapes, each of the shapes being a polygon having a plurality of sides and plurality of vertices;
• link one or more of the shapes in the first basis layout with one or more of the shapes in the second basis layout that represent a common feature of the cell design resulting in a plurality of linked shapes;
• and
• change a location of the vertices of each of the linked shapes, starting with either the first basis layout or the second basis layout, based on a location of the vertices in the first basis layout and the second basis layout to produce the variant layout for the cell design.

An article of manufacture for generating at least one variant layout for a cell design, comprising a machine-readable recordable medium containing one or more programs which when executed implement the steps of:

• obtaining at least a first basis layout and a second basis layout for the cell design, wherein the first basis layout and the second basis layout each comprises a plurality of shapes, each of the shapes being a polygon having a plurality of sides and plurality of vertices;
• linking one or more of the shapes in the first basis layout with one or more of the shapes in the second basis layout that represent a common feature of the cell design resulting in a plurality of linked shapes;
• and
• changing a location of the vertices of each of the linked shapes, starting with either the first basis layout or the second basis layout, based on a location of the vertices in the first basis layout and the second basis layout to produce the variant layout for the cell design.