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US 8,510,688 B1Granted
Method and apparatus for performing multiple stage physical synthesis
AssigneeAltera Corporation
InventorsDeshanand Singh, Valavan Manohararajah, Gordon Raymond Chiu, Ivan Blunno, Stephen D. Brown
Life of this patent
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Abstract
A method for designing a system on a target device includes entering the system. The system is synthesized. The system is mapped. The system is placed on the target device. The system is routed. Physical synthesis is performed on the system immediately after more than one of the entering, synthesizing, mapping, placing and routing procedures.
Claims19
A method for designing a system on a target device, the method comprising:
- mapping a system on the target device;
- placing the system on the target device;
- and
- performing physical synthesis on the system subsequent to the mapping procedure and prior to the placing procedure by performing circuit transformations on a circuit in the system to satisfy timing constraints, wherein at least one of the mapping, placing, and performing procedures is performed by a processor.
1 more element
A method for designing a system on a target device, the method comprising:
- routing the system on the target device;
- performing a first physical synthesis on the system prior to the routing;
- and
- performing a second physical synthesis on the system, which experienced the first physical synthesis, after the routing, wherein at least one of the routing and performing procedures is performed by a processor.
1 more element
A system designer comprising:
- a synthesis unit operable to generate a design for a system;
- a mapping unit operable to determine available components on a target device to implement the design;
- a placement unit operable to assign components on the target device to the system;
- a routing unit operable to assign routing resources on the target device to connect the components;
- and
- a physical synthesis unit operable to perform physical synthesis on the system prior to the placement unit assigning the components on the target device to the system performing physical synthesis on the system subsequent to the mapping procedure and prior to the placing procedure, wherein the physical synthesis includes performing circuit transformations on a circuit in the system to satisfy timing constraints, and wherein at least one of the synthesis, mapping, placement, routing, and physical synthesis units is implemented using hardware.
3 more elements
Dependencies are inferred from the claim text.