US 8,510,685 B1Granted

Methods, systems, and articles of manufacture for creating a hierarchical output for an operation in an electronic design

AssigneeCadence Design Systems, Inc.

InventorsSabra Rossman, Mark Rossman

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Abstract

Disclosed are methods, systems, and articles of manufacture for processing a electronic design, which use a computer system to identify an operation associated with a task to be performed on the electronic design, to generate a hierarchical output for multiple shapes for performing the task based at least in part on performing an operation associated with the task, and to display or to store the hierarchical output. The task comprises a dummy fill insertion task or a design verification task in some embodiments. The methods or the systems may further determine or identify an inverse transform and apply the inverse transform to a shape before adding the shape to the hierarchical output. In some embodiments, there exists no duplication among the shapes in the hierarchical output, or only shapes derived from original shapes that belong to the first instance of a cellview master are added to the hierarchical output.

Claims29

Dependent claims

A computer implemented method for processing a hierarchical electronic circuit design, the method comprising:

using a computer system which comprises at least one processor to perform a processes, the process comprising:
identifying one or more logical operations that are associated with a task and involves at least one logical operator, wherein
the task is to be performed on the hierarchical electronic circuit design, which comprises a hierarchy including a first level and a second level;
and
generating a hierarchical output, rather than a flattened output, for a plurality of shapes in the hierarchical electronic circuit design for a result of performing the task on at least some shapes of the plurality of shapes in the hierarchical electronic circuit design based at least in part upon performing the one or more logical operations associated with the task on the at least some shapes on multiple hierarchical levels to determine a derivative shape having a different geometry from the at least some shapes, without flattening the multiple hierarchical levels concerning the at least some shapes in the hierarchical electronic circuit design, wherein the act of generating the hierarchical output comprises:
reducing one or more overlapping geometries by at least operating on a subsequently added shape with one or more previously added shapes.

3 more elements

A apparatus for processing a hierarchical electronic circuit design, the system comprising:

a computer system which comprises at least one processor and is to:
identify one or more logical operations associated with the task and involves at least one logical operator, wherein
the task is to be performed on the hierarchical electronic circuit design which comprises a hierarchy including a first level and a second level;
and
generate a hierarchical output, rather than a flattened output, for a plurality of shapes in the hierarchical electronic circuit design for a result of performing the task on at least some shapes of the plurality of shapes in the hierarchical electronic circuit design based at least in part upon performing the one or more operations associated with the task on the at least some shapes on multiple hierarchical levels to determine a derivative shape having a different geometry from the at least some shapes, without flattening the multiple hierarchical levels concerning the at least some shapes in the hierarchical electronic circuit design, wherein the act of generating the hierarchical output comprises:
reducing one or more overlapping geometries by at least operating on a subsequently added shape with one or more previously added shapes.

3 more elements

An article of manufacture of a computer program product comprising a non-transitory computer readable storage medium having a sequence of instructions which, when executed by a computer system, cause one or more processors, processor cores, or combination thereof to execute a method for processing a hierarchical electronic circuit design, the method comprising:

using the computer system which comprises at least one processor or a processor core and is to perform a process, the process comprising:
identifying one or more logical operations that are associated with the task and involves at least one logical operator, wherein
the task is to be performed on the hierarchical electronic circuit design which comprises a hierarchy including a first level and a second level;
and
generating a hierarchical output, rather than a flattened output, for a plurality of shapes in the hierarchical electronic circuit design for a result of performing the task on at least some shapes of the plurality of shapes in the hierarchical electronic circuit design based at least in part upon performing the one or more operations associated with the task on the at least some shapes on multiple hierarchical levels to determine a derivative shape having a different geometry from the at least some shapes, without flattening the multiple hierarchical levels concerning the at least some shapes in the hierarchical electronic circuit design, wherein the act of generating the hierarchical output comprises:
reducing one or more overlapping geometries by at least operating on a subsequently added shape with one or more previously added shapes.

3 more elements

Dependencies are inferred from the claim text.