Data transfer to memory over an input/output (I/O) interconnect

A system for data transfer to memory over an input/output (I/O) interconnect, comprising:

• an input/output (I/O) adapter external to all hub devices in communication with a chipset having a multiplexer and control unit, system memory, and a processor complex having a cache control unit, the processor complex comprising a hierarchically organized cache and processing units;
• a mailbox stored on the I/O adapter;
• and
• logic executing on the I/O adapter, the logic performing:
• reading the mailbox in response to a request to initiate an input/output (I/O) transaction, the mailbox storing a directive that defines a condition under which cache injection for data values in the I/O transaction will not be performed;
• and
• embedding a hint into the I/O transaction when the directive in the mailbox matches data received in the request;
• wherein the chipset executes the I/O transaction by directly storing the data values from the I/O transaction into the system memory using the multiplexer and suppressing the cache injection of the data values into a cache memory of the processor complex, the suppression of the cache injection occurring responsive to detecting the hint in a header of the I/O transaction and without disabling the cache memory.

A computer program product for data transfer to memory over an input/out (I/O) interconnect, the computer program product comprising:

• a storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for implementing a method, the method comprising:
• reading a mailbox stored on an input/output (I/O) device in response to a request to initiate an input/output (I/O) transaction, the I/O device external to all hub devices and the mailbox storing a directive that defines a condition under which cache injection for data values in the I/O transaction will not be performed;
• embedding a hint into the I/O transaction when the directive in the mailbox matches data received in the request;
• and
• executing the I/O transaction;
• wherein execution of the I/O transaction causes a system chipset or an input/output (I/O) hub, for a processor receiving the I/O transaction, to directly store the data values from the I/O transaction into system memory and to suppress the cache injection of the data values into a cache memory, the suppression of the cache injection occurring responsive to detecting the hint in a header of the I/O transaction and without disabling the cache memory.