Synchronization transmissions in a wireless communication system

An apparatus comprising:

• a processor configured to send a first synchronization transmission in a first location of a frame, and to send a second synchronization transmission in a second location of the frame, wherein a first distance between the first and second locations of the frame is different from a second distance between the second location of the frame and the first location of a next frame;
• and
• a memory coupled to the processor, wherein the processor is configured to generate the first and second synchronization transmissions based on one of multiple cyclic prefix lengths.

An apparatus comprising:

• a processor configured to send a first primary synchronization code (PSC) on a primary synchronization channel (P-SCH) in a first location of a frame, and to send a second PSC on the P-SCH in a second location of the frame, wherein a first distance between the first and second locations of the frame is different from a second distance between the second location of the frame and the first location of a next frame;
• and
• a memory coupled to the processor, wherein the processor is configured to use a cyclic prefix length based on the first distance.

An apparatus comprising:

• a processor configured to receive a first synchronization transmission in a first location of a frame, to receive a second synchronization transmission in a second location of the frame, to perform detection for the first and second synchronization transmissions, and to determine a first distance between the first and second locations of the frame, the first distance being different from a second distance between the second location of the frame and the first location of a next frame;
• and
• a memory coupled to the processor, wherein the processor is configured to determine a cyclic prefix length used by a cell sending the first and second synchronization transmissions based on the first distance.

An apparatus comprising:

• a processor configured to receive a first synchronization transmission in a first location of a frame, to receive a second synchronization transmission in a second location of the frame, to perform detection for the first and second synchronization transmissions, and to determine a first distance between the first and second locations of the frame, the first distance being different from a second distance between the second location of the frame and the first location of a next frame;
• and
• a memory coupled to the processor, wherein the processor is configured to receive a third synchronization transmission in a third location of the frame, the third location being a predetermined offset from the first location, and wherein the processor is configured to determine a group of cell identifiers based on the first distance and to perform correlation for the third synchronization transmission based on the group cell identifiers to obtain a cell identifier for a cell sending the first, second and third synchronization transmissions.

An apparatus comprising:

• a processor configured to send a primary synchronization transmission in a first location of a frame, the first location being non-overlapping with at least one other location used for at least one other primary synchronization transmission sent by at least one neighboring cell, and to send a secondary synchronization transmission in a second location of the frame;
• and
• a memory coupled to the processor, wherein the processor is configured to use a cyclic prefix length based on a distance between the first and second locations of the frame.

An apparatus comprising:

• a processor configured to receive a primary synchronization transmission from a first cell in a first location of a frame, the first location being non-overlapping with at least one other location used for at least one other primary synchronization transmission sent by at least one neighboring cell in a synchronized network, and to receive a secondary synchronization transmission from the first cell in a second location of the frame;
• and
• a memory coupled to the processor, wherein the processor is configured to determine a cyclic prefix length used by the cells sending the primary synchronization transmissions based on a distance between the first and second locations of the frame.