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US 8,509,023 B2Granted
Method and system for split threshold voltage programmable bitcells
AssigneeBroadcom Corporation
InventorJonathan Schmitt
Life of this patent
Estimating the term…
Abstract
A memory device includes an antifuse. The antifuse is configured to program a bit cell of the memory device. The antifuse is configured with a PMOS device.
Claims20
A bitcell comprising:
- an insulating layer;
- a first doping layer under the insulating layer;
- a second doping layer under the insulating layer and characterized by a higher gate voltage breakdown than the first doping layer;
- and
- a gate terminal for the insulating layer, the bitcell configured for programming by a voltage on the gate terminal that results in a conductive hole selectively burned in the insulating layer between the gate terminal and the first doping layer.
2 more elements
A bitcell comprising:
- an insulating layer;
- a first doping layer under the insulating layer;
- a second doping layer under the insulating layer and characterized by a lower threshold voltage than the first doping layer;
- and
- a gate terminal for the insulating layer, the bitcell configured for programming by a voltage on the gate terminal that results in a conductive hole selectively burned in the insulating layer between the gate terminal and the first doping layer.
2 more elements
A bitcell comprising:
- a gate region;
- an insulating layer under the gate region;
- and
- a substrate layer defining a channel under the insulating layer, the channel comprising a variable doping profile that causes formation of a conductive hole, burned through the insulating layer, in a selected portion of the insulating layer above the doped channel.
1 more element
Dependencies are inferred from the claim text.