Data strobe signal generating device and a semiconductor memory apparatus using the same

A data strobe signal generating device, comprising:

• an enable unit configured to receive an output enable signal, and first and second clock signals to generate first and second enable signals enabled at a predetermined time interval;
• a preamble pulse generator configured to receive the first and second enable signals to generate a preamble signal;
• and
• a data strobe signal output unit configured to receive the preamble signal to generate a data strobe signal, wherein the enable unit includes:
• a first enable time adjusting unit configured to receive the output enable signal and the first clock signal to generate the first enable signal;
• and
• a second enable time adjusting unit configured to receive the first enable signal and the second clock signal to generate the second enable signal.

A semiconductor memory apparatus, comprising:

• a clock generator generating first and second clock signals toggled in synchronization with an external clock signal;
• a preamble controller generating a preamble signal enabled in synchronization with the first clock signal and disabled in synchronization with the second clock signal after an output enable signal is enabled;
• and
• a data strobe signal output unit generating a data strobe signal in response to the preamble signal, wherein the preamble controller includes:
• a first enable time adjusting unit receiving the output enable signal and the first clock signal to generate a first enable signal;
• a second enable time adjusting unit receiving the first enable signal and the second clock signal to generate a second enable signal;
• and
• a preamble pulse generator receiving the first and second enable signals to generate the preamble signal.