Read architecture for MRAM
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKai-Chun Lin, Hung-Chang Yu, Yue-Der Chih
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKai-Chun Lin, Hung-Chang Yu, Yue-Der Chih
Estimating the term…
A read architecture for reading random access memory (RAM) cells includes a multi-level sense amplifier, the multi-level sense amplifier including a plurality of sense amplifiers, each sense amplifier having a respective sense threshold and a respective sense output, and a storage module coupled to the multi-level sense amplifier for storing the sense outputs of the multi-level sense amplifier. The storage module stores a first set of sense outputs corresponding to a first read of an RAM cell and stores a second set of sense outputs corresponding to a second read of the RAM cell. The architecture also includes a decision module for comparing the first and second set of sense outputs and determining a data state of the RAM cell based on the comparison.
A read architecture for reading random access memory (RAM) cells, comprising:
A method of reading a random access memory (RAM) cell, wherein the RAM cell is programmable to a high resistance state and a low resistance state comprising the steps of:
A non-destructive method of reading a magnetoresistive random access memory (MRAM) cell, wherein the MRAM cell is programmable to a high resistance state and a low resistance state, comprising the steps of:
Dependencies are inferred from the claim text.