Adaptive write procedures for non-volatile memory
AssigneeFreescale Semiconductor, Inc.
InventorsChen He, Richard K. Eguchi
Life of this patent
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Abstract
A method includes performing a write operation on memory cells of a memory array to a first logic state using a voltage of a charge pump. A portion of the write operation is performed on the memory cells of the memory array using the voltage of the charge pump. A level of the voltage is compared to a reference. If the level of the voltage is below the reference, the write operation is continued with an increased level of the voltage by reducing load on the charge pump by providing the voltage on a reduced number of memory cells, wherein the reduced number of memory cells is a first subset of the memory cells.
Claims20
A method of performing a write operation on memory cells of a memory array to a first logic state using a voltage of a charge pump, the method comprising:
- performing a portion of the write operation on the memory cells of the memory array using the voltage of the charge pump;
- comparing a level of the voltage to a reference;
- and
- if the level of the voltage is below the reference, continuing the write operation with an increased level of the voltage by reducing load on the charge pump by providing the voltage on a reduced number of memory cells, wherein the reduced number of memory cells is a first subset of the memory cells.
A method of performing a write operation on memory cells of a memory array to a first logic state using a voltage of a charge pump, the method comprising:
- performing a portion of the write operation on the memory cells of the memory array using the voltage of the charge pump;
- in response to completing the performing the portion, comparing the voltage to a reference voltage;
- and
- if the voltage has a magnitude less than a magnitude of the reference voltage, continuing the write operation on a decreased number of the memory cells, wherein the decreased number of the memory cells comprise a subset of the memory cells.
A non-volatile memory system, comprising:
- an array of memory cells that are non-volatile;
- charge pumps that have outputs that provide a voltages for a write operation;
- and
- a controller that causes the output to be coupled to the memory cells to perform a write to a first logic state on the memory cells, determines if loading by the memory cells results is excessive by comparing the voltage to a reference, and if the loading is excessive, the write operation is continued with an increased level of the voltage by reducing load on the charge pump by providing the voltage on a reduced number of memory cells, wherein the reduced number of memory cells is a first subset of the memory cells.
Dependencies are inferred from the claim text.