Method for performing memory access management, and associated memory device and controller thereof

A method for performing memory access management, the method comprising:

• with regard to a same Flash cell of a Flash memory, receiving a first digital value outputted by the Flash memory, requesting the Flash memory to output at least one second digital value, wherein the first digital value and the at least one second digital value are utilized for determining information of a same bit stored in the Flash cell, and a number of various possible states of the Flash cell is equal to a number of various possible combinations of all bit(s) stored in the Flash cell;
• based upon the at least one second digital value, generating/obtaining soft information of the Flash cell, for use of performing soft decoding;
• with regard to a specific bit of the Flash cell, determining a first voltage difference and a second voltage difference according to two closest states in which respective values of the specific bit are different from each other, wherein the first voltage difference represents a voltage difference between a determined voltage and a threshold voltage of a first state of the two closest states, and the second voltage difference represents a voltage difference between the determined voltage and a threshold voltage of a second state of the two closest states;
• and
• determining soft information corresponding to the specific bit according to the first voltage difference and the second voltage difference.

A method for performing memory access management, the method comprising:

• with regard to a same memory cell of a memory, receiving a first digital value outputted by the memory, requesting the memory to output at least one second digital value, wherein the first digital value and the at least one second digital value are utilized for determining information of a same bit stored in the memory cell, and a number of various possible states of the memory cell is equal to a number of various possible combinations of all bit(s) stored in the memory cell;
• based upon the at least one second digital value, generating/obtaining soft information of the memory cell, for use of performing soft decoding;
• with regard to respective memory cells corresponding to a same page within the memory, controlling the memory to read respective sign bits of the memory cells;
• performing hard decoding on the sign bits;
• and
• in a situation where failure of the hard decoding is detected, with regard to each memory cell of at least one portion of the memory cells, controlling the memory to read at least a next bit, for performing soft decoding.

A memory device, comprising:

• a Flash memory, wherein the Flash memory comprises a plurality of blocks;
• and
• a controller arranged to access the Flash memory and manage the plurality of blocks, and further perform memory access management regarding data accessed by the controller itself, wherein with regard to a same Flash cell of the Flash memory, according to a first digital value output by the Flash memory, the controller requests the Flash memory to output at least one second digital value, wherein the first digital value and the at least one second digital value are utilized for determining information of a same bit stored in the Flash cell, and a number of various possible states of the Flash cell is equal to a number of various possible combinations of all bit(s) stored in the Flash cell;
• wherein based upon the at least one second digital value, the controller generates/obtains soft information of the Flash cell, for use of performing soft decoding, and the controller controls the Flash memory to perform sensing operations by respectively utilizing a plurality of sensing voltages that are not all the same, in order to generate at least one portion of digital values within the first digital value and the at least one second digital value.

A controller of a memory device, the controller being utilized for accessing a Flash memory, the Flash memory comprising a plurality of blocks, the controller comprising:

• a read only memory (ROM) arranged to store a program code;
• and
• a microprocessor arranged to execute the program code to control the access to the Flash memory and manage the plurality of blocks, wherein under control of the microprocessor, the controller performs memory access management regarding data accessed by the controller itself, and with regard to a same Flash cell of the Flash memory, according to a first digital value output by the Flash memory, the controller requests the Flash memory to output at least one second digital value, wherein the first digital value and the at least one second digital value are utilized for determining information of a same bit stored in the Flash cell, and a number of various possible states of the Flash cell is equal to a number of various possible combinations of all bit(s) stored in the Flash cell;
• wherein based upon the at least one second digital value, the controller generates/obtains soft information of the memory cell, for use of performing soft decoding, and the controller controls the Flash memory to perform sensing operations by respectively utilizing a plurality of sensing voltages that are not all the same, in order to generate at least one portion of digital values within the first digital value and the at least one second digital value.