Array substrate and display panel having the same

An array substrate comprising:

• a gate line formed along a first direction;
• a data line formed along a second direction crossing the first direction;
• first and second pixel electrodes spaced apart from each other along the second direction;
• and
• a thin-film transistor (TFT) including a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode connected to the first pixel electrode and spaced apart from the second pixel electrode along the second direction, wherein the TFT partially overlaps the second pixel electrode in plan view.

An array substrate comprising:

• a plurality of gate lines formed along a first direction;
• a plurality of data lines formed along a second direction crossing the first direction;
• a first thin-film transistor electrically connected to a first gate line;
• a second thin-film transistor electrically connected to a second gate line, which is spaced apart from the first gate line in the second direction;
• a first pixel electrode electrically connected to a drain electrode of the first TFT;
• and
• a second pixel electrode connected to a drain electrode of the second TFT and partially overlapping the first gate line in a plan view and having a recess that has a shape receiving the drain electrode of the first TFT.

A display panel comprising:

• an array substrate including:
• a gate line formed along a first direction;
• a data line formed along a second direction crossing the first direction;
• first and second pixel electrodes spaced apart from each other;
• and
• a thin-film transistor (TFT) including a gate electrode connected to the gate line, a source electrode connected to the data line and partially overlapping the second pixel electrode in a plan view, and a drain electrode connected to the first pixel electrode and spaced apart from the second pixel electrode along the second direction, an opposite substrate opposite to the array substrate;
• and
• a liquid crystal layer interposed between the array substrate and the opposite substrate.