Device for the analog/digital conversion of signals in a large dynamic range
AssigneeRohde & Schwarz GmbH & Co. KG
InventorMartin Hisch
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AssigneeRohde & Schwarz GmbH & Co. KG
InventorMartin Hisch
Estimating the term…
A device for expanding the dynamic range of a broadband analog/digital converter is provided. The device comprises a splitter module configured to split an analog input signal into a first analog signal output on a first signal branch, and a second analog signal output on a second signal branch. The device further comprises a first analog/digital converter configured to digitize the first analog signal into a first digital signal, a second analog/digital converter configured to digitize the second analog signal into a second digital signal, and a first switching module configured to switch one of the first signal branch and the second signal branch to an output of the apparatus. The device further comprises a first regulating module, disposed between the second analog/digital converter and the first switching module, wherein the first regulating module is configured to adaptively match amplitudes of the second digital signal to amplitudes of the first digital signal.
An apparatus comprising:
Dependencies are inferred from the claim text.
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Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging: multi-path, i.e. having a separate…
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The present application is a national phase application of PCT Application No. PCT/EP2010/000859, filed on Feb. 11, 2010, and claims priority to German Patent Application No. DE 10 2009 012 562.0, filed on Mar. 11, 2009, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The invention relates to a device for expanding the dynamic range of a broadband analog/digital converter.
Various exemplary embodiments are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings in which like reference numerals refer to similar elements and in which:
FIG. 1 shows a schematic presentation of a first exemplary embodiment of the device according to the invention for the digitization of data; and
FIG. 2 shows a schematic presentation of a second exemplary embodiment of the device according to the invention for the digitization of data.
FIG. 1 shows a circuit 1 of a first exemplary embodiment of the device according to the invention for the digitization of data. An analog input signal 2 is amplified in a pre-amplifier 3 to form an amplified analog input signal 4 and supplied to a power splitter 5. The power splitter 5 provides a first and a second output 6 and 7, to which the amplified analog input signal 4 is a supplied in an attenuated manner in each case with the power fractions (n−1)/n and 1/n. With n=16, a ratio of the two power fractions of almost 12 dB is obtained. The power splitter 5 therefore outputs at the first output 6 a first analog output signal 8, which corresponds to the amplified analog input signal 4 attenuated with the power fraction (n×1)/n. Accordingly, the power splitter 5 outputs at the second output 7 a second analog output signal 9, which corresponds to the amplified analog input signal 4 attenuated with the power fraction 1/n.
The two outputs 6 and 7 of the power splitter 5 are each connected to an analog input 10 and 11 of a first or of a second analog-to-digital converter (ADC or analog/digital converter) 12 and 13. The two analog/digital converters 12 and 13 are of the same type and are synchronized by a sampling clock 14. This ensures that the two ADCs 12 and 13 receive the same signal component of the input signal 2 at the same time in each case with different attenuation at the input 10 and 12 and also digitize the analog signal values at the same time and pass them to the digital outputs 15 and 16. As a result of the fact that the two analog signals 8 and 9 have been attenuated in a different manner, the second ADC 13 can still operate normally even if the first ADC 12 is already in an overdriven condition. The first ADC 12 has a control output 17, at which a control signal 18 can be output when the first ADC 12 is in an overdriven condition.
The digital outputs 15 and 16 are each connected to an input of the first and second digital data reducer (DDR) 21 and 22. The first and the second digitized output signal 19 and 20 of the first and the second ADCs 12 and 13 are each compressed in the first and second digital data reducer 21 and 22.