US 8,508,301 B2Granted

Three dimensional inductor, transformer and radio frequency amplifier

AssigneeQUALCOMM Incorporated

InventorsJonghae Kim, Shiqun Gu, Brian Matthew Henderson, Thomas R. Toms, Lew G. Chua-Eoan, Seyfollah S. Bazarjani, Matthew Nowak

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Abstract

A three dimensional on-chip radio frequency amplifier is disclosed that includes first and second transformers and a first transistor. The first transformer includes first and second inductively coupled inductors. The second transformer includes third and fourth inductively coupled inductors. Each inductor includes multiple first segments in a first metal layer; multiple second segments in a second metal layer; first and second inputs, and multiple through vias coupling the first and second segments to form a continuous path between the first and second inputs. The first input of the first inductor is coupled to an amplifier input; the first input of the second inductor is coupled to the first transistor gate; the first input of the third inductor is coupled to the first transistor drain, the first input of the fourth inductor is coupled to an amplifier output. The second inductor inputs and the first transistor source are coupled to ground.

Claims22

Dependent claims

A three dimensional on-chip radio frequency amplifier comprising:

a first on-chip transformer comprising a first on-chip inductor and a second on-chip inductor;
a second on-chip transformer comprising a third on-chip inductor and a fourth on-chip inductor;
and
an on-chip transistor comprising a gate, a drain and a source;
wherein each of the first, second, third and fourth on-chip inductors comprises a plurality of first segments in a first metal layer;
a plurality of second segments in a second metal layer;
a first inductor input and a second inductor input, the first and second inductor inputs being located in one of the first metal layer and the second metal layer;
and a plurality of through vias coupling the plurality of first segments and the plurality of second segments to form a continuous, non-intersecting path between the first inductor input and the second inductor input;
the first on-chip inductor being inductively coupled to the second on-chip inductor, the third on-chip inductor being inductively coupled to the fourth on-chip inductor, and the first, second, third and fourth on-chip inductors not being physically coupled to one another except through ground;
the first inductor input of the first on-chip inductor being coupled to an input of the on-chip radio frequency amplifier;
the first inductor input of the second on-chip inductor being coupled to the gate of the on-chip transistor;
the first inductor input of the third on-chip inductor being coupled to the drain of the on-chip transistor, the first inductor input of the fourth on-chip inductor being coupled to an output of the on-chip radio frequency amplifier;
the second inductor input of the first, second, third and fourth on-chip inductors being coupled to ground;
and the source of the on-chip transistor being coupled to ground.

11 more elements

A three dimensional on-chip radio frequency amplifier comprising:

a first on-chip transformer comprising a first on-chip inductor and a second on-chip inductor;
a second on-chip transformer comprising a third on-chip inductor and a fourth on-chip inductor;
a fifth on-chip inductor including a first inductor input and a second inductor input;
a sixth on-chip inductor including a first inductor input and a second inductor input;
a first on-chip transistor comprising a gate, a drain and a source;
and
a second on-chip transistor including a gate, a drain and a source;
wherein each of the first, second, third and fourth on-chip inductors comprises a plurality of first segments in a first metal layer;
a plurality of second segments in a second metal layer;
a first inductor input and a second inductor input, the first and second inductor inputs of each of the first, second, third and fourth on-chip inductors being located in one of the first metal layer and the second metal layer;
and a plurality of through vias coupling the plurality of first segments and the plurality of second segments to form a continuous, non-intersecting path between the first inductor input and the second inductor input of each of the first, second, third and fourth on-chip inductors;
the first on-chip inductor being inductively coupled to the second on-chip inductor, the third on-chip inductor being inductively coupled to the fourth on-chip inductor, and the first, second, third and fourth on-chip inductors not being physically coupled to one another except through ground;
the first inductor input of the first on-chip inductor being coupled to an input of the on-chip radio frequency amplifier;
the first inductor input of the second on-chip inductor being coupled to the gate of the first on-chip transistor;
the first inductor input of the third on-chip inductor being coupled to the drain of the second on-chip transistor, the first inductor input of the fourth on-chip inductor being coupled to an output of the on-chip radio frequency amplifier;
the gate of the second on-chip transistor being coupled to the drain of the first on-chip transistor;
the first inductor inputs of the fifth and sixth on-chip inductors being coupled to a supply voltage;
the second inductor input of the fifth on-chip inductor being coupled to the drain of the first on-chip transistor;
the second inductor input of the sixth on-chip inductor being coupled to the drain of the second on-chip transistor;
the second inductor input of the first, second, third and fourth on-chip inductors being coupled to ground;
the source of the first and second on-chip transistors being coupled to ground.

18 more elements

A three dimensional on-chip radio frequency amplifier comprising:

a first on-chip transformer comprising a first on-chip inductor and a second on-chip inductor;
a second on-chip transformer comprising a third on-chip inductor and a fourth on-chip inductor;
and
an on-chip transistor comprising a gate, a drain and a source;
wherein each of the first, second, third and fourth on-chip inductors comprises a plurality of first conducting means in a first metal layer;
a plurality of second conducting means in a second metal layer;
a first inductor input and a second inductor input, the first and second inductor inputs being located in one of the first metal layer and the second metal layer;
and a plurality of through vias coupling the plurality of first conducting means and the plurality of second conducting means to form a continuous, non-intersecting path between the first inductor input and the second inductor input;
the first on-chip inductor being inductively coupled to the second on-chip inductor, the third on-chip inductor being inductively coupled to the fourth on-chip inductor, and the first, second, third and fourth on-chip inductors not being physically coupled to one another except through ground;
the first inductor input of the first on-chip inductor being coupled to an input of the on-chip radio frequency amplifier;
the first inductor input of the second on-chip inductor being coupled to the gate of the on-chip transistor;
the first inductor input of the third on-chip inductor being coupled to the drain of the on-chip transistor, the first inductor input of the fourth on-chip inductor being coupled to an output of the on-chip radio frequency amplifier;
the second inductor input of the first, second, third and fourth on-chip inductors being coupled to ground;
and the source of the on-chip transistor being coupled to ground.

11 more elements

A three dimensional on-chip radio frequency amplifier comprising:

a first on-chip transformer comprising a first on-chip inductor and a second on-chip inductor;
a second on-chip transformer comprising a third on-chip inductor and a fourth on-chip inductor;
a fifth on-chip inductor including a first inductor input and a second inductor input;
a sixth on-chip inductor including a first inductor input and a second inductor input;
a first on-chip transistor comprising a gate, a drain and a source;
and
a second on-chip transistor including a gate, a drain and a source;
wherein each of the first, second, third and fourth on-chip inductors comprises a plurality of first conducting means in a first metal layer;
a plurality of second conducting means in a second metal layer;
a first inductor input and a second inductor input, the first and second inductor inputs of each of the first, second, third and fourth on-chip inductors being located in one of the first metal layer and the second metal layer;
and a plurality of through vias coupling the plurality of first conducting means and the plurality of second conducting means to form a continuous, non-intersecting path between the first inductor input and the second inductor input of each of the first, second, third and fourth on-chip inductors;
the first on-chip inductor being inductively coupled to the second on-chip inductor, the third on-chip inductor being inductively coupled to the fourth on-chip inductor, and the first, second, third and fourth on-chip inductors not being physically coupled to one another except through ground;
the first inductor input of the first on-chip inductor being coupled to an input of the on-chip radio frequency amplifier;
the first inductor input of the second on-chip inductor being coupled to the gate of the first on-chip transistor;
the first inductor input of the third on-chip inductor being coupled to the drain of the second on-chip transistor, the first inductor input of the fourth on-chip inductor being coupled to an output of the on-chip radio frequency amplifier;
the gate of the second on-chip transistor being coupled to the drain of the first on-chip transistor;
the first inductor inputs of the fifth and sixth on-chip inductors being coupled to a supply voltage;
the second inductor input of the fifth on-chip inductor being coupled to the drain of the first on-chip transistor;
the second inductor input of the sixth on-chip inductor being coupled to the drain of the second on-chip transistor;
the second inductor input of the first, second, third and fourth on-chip inductors being coupled to ground;
the source of the first and second on-chip transistors being coupled to ground.

18 more elements

A method for forming a three dimensional on-chip radio frequency amplifier, comprising:

forming a first on-chip transformer comprising a first on-chip inductor and a second on- chip inductor and a second on-chip transformer comprising a third on-chip inductor and a fourth on-chip inductor, wherein the first, second, third and fourth on-chip inductors are not physically coupled to one another except through ground, and wherein the first, second, third and fourth on- chip inductors each comprise a plurality of first segments in a first metal layer, a plurality of second segments in a second metal layer, a first inductor input located in one of the first metal layer and the second metal layer, a second inductor input located in one of the first metal layer and the second metal layer, and a plurality of through vias coupling the plurality of first segments and the plurality of second segments to form a continuous, non-intersecting path between the first inductor input and the second inductor input of each of the first, second, third and fourth on-chip inductors;
forming a fifth on-chip inductor and a sixth on-chip inductor, wherein the fifth and sixth on-chip inductors each include a first inductor input and a second inductor input;
inductively coupling the first on-chip inductor to the second on-chip inductor and inductively coupling the third on-chip inductor to the fourth on-chip inductor;
coupling the first inductor input of the first on-chip inductor to an input of the on-chip radio frequency amplifier, coupling the first inductor input of the second on-chip inductor to a gate of a first on-chip transistor, coupling the first inductor input of the third on-chip inductor and the second inductor input of the sixth on-chip inductor to a drain of a second on-chip transistor, coupling the first inductor input of the fourth on-chip inductor to an output of the on- chip radio frequency amplifier, and coupling a gate of the second on-chip transistor and the second inductor input of the fifth on-chip inductor to a drain of the first on-chip transistor;
coupling the first inductor input of the fifth on-chip inductor and the first inductor input of the sixth on-chip inductor to a supply voltage;
and
coupling the second inductor input of the first, second, third and fourth on-chip inductors and a source of the first and second on-chip transistors to ground.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/294,351Filed 11 Nov 2011 · division
Priority: 8 Oct 2009
Published: US 2012/0056680 A18 Mar 2012
Granted: 13 Aug 2013
Term ends: Not estimatedThe source records don’t support an estimate.

Classification12 codes

H10D 1/20
Resistors, capacitors or inductors: inductors
H01F 17/0013
Printed inductances: with stacked layers
H01F 19/04
Fixed transformers or mutual inductances of the signal type: transformers or mutual inductances suitable for handling frequencies considerably…
H10W 20/20
Interconnections in chips, wafers or substrates: interconnections within wafers or substrates, e.g. through-silicon vias [TSV]

Family

Application12/576,033Parent of this division · filed 8 Oct 2009
US 2012/0056680 A1Pre-grant publication · published 8 Mar 2012
US 2011/0084765 A1Published application
US 8,143,952 B2Related patent
US 8,508,301 B2This patent

From the US filing history. Foreign family members aren’t listed.