Semiconductor device, method for operating the same, and memory system including the same
AssigneeHynix Semiconductor Inc.
InventorNak-Kyu Park
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes a clock supply circuit configured to generate an internal clock by using an external clock, an internal circuit configured to operate in synchronization with the internal clock and enter a power-down mode in response to a power-down signal, and a controller configured to control an entry of the clock supply circuit into the power-down mode in response to a locking signal, which represents that the clock supply circuit has been locked, and the power-down signal.
Claims7
A semiconductor device comprising:
- a clock supply circuit configured to generate an internal clock by using an external clock;
- an internal circuit configured to operate in synchronization with the internal clock and enter a power-down mode in response to a power-down signal irrespective of a locking operation of the clock supply circuit;
- and
- a controller configured to control an entry of the clock supply circuit into the power-down mode in response to the power-down signal and a locking signal after the clock supply circuit is locked, wherein the controller controls the clock supply circuit not to enter the power-down mode during the locking operation of the clock supply circuit.
A method for operating a semiconductor device, which includes a clock supply circuit configured to generate an internal clock and an internal circuit configured to operate in synchronization with the internal clock, the method comprising:
- allowing the internal circuit to enter a power-down mode in response to a power-down signal applied from the outside of the semiconductor device irrespective of a locking operation of the clock supply circuit;
- determining whether locking of the clock supply circuit has been completed;
- and
- allowing the clock supply circuit to enter the power-down mode in response to the power-down signal after the locking of the clock supply circuit has been completed,
- wherein if the locking operation of the clock supply circuit is not completed, the clock supply circuit does not enter the power-down mode during the locking operation of the clock supply circuit.
Dependencies are inferred from the claim text.