Chip package including multiple sections for reducing chip package interaction
AssigneeGlobalfoundries Inc.
InventorDmytro Chumakov
Life of this patent
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Abstract
Thermally induced stress in a semiconductor die, i.e., in a complex metallization system thereof, may be reduced by “dividing” a package substrate into two or more substrate sections, which may have formed therebetween an appropriate stress buffer region, for instance a region of superior resiliency. In this case, the total deformation of the package substrate may be reduced, thereby also reducing the thermally induced stress forces in the complex metallization system of the semiconductor die. Hence, for a given size and complexity of a metallization system, an increased production yield and superior reliability may be achieved.
Claims20
A semiconductor device, comprising:
- a semiconductor chip comprising a chip contact structure;
- and
- a package substrate connected to said chip contact structure, said package substrate comprising a first substrate section, a second substrate section that is physically separated from said first substrate section and a stress buffer region positioned between and laterally separating said first and second physically separated substrate sections, said stress buffer region resiliently connecting said first and second substrate sections to one another.
A package for receiving a semiconductor chip, comprising:
- a package substrate comprising a first substrate section and a second substrate section that is physically separated from said first substrate section and a stress buffer region that mechanically and resiliently connects said first and second substrate sections to one another;
- and
- a package contact structure formed above said package substrate and configured to directly connect to a complementary contact structure of said semiconductor chip.
A method of forming a packaged semiconductor device, the method comprising:
- providing a semiconductor chip comprising a chip contact structure;
- attaching a first substrate section of a package substrate to a first portion of said chip contact structure;
- attaching a second substrate section of said package substrate to a second portion of said chip contact structure;
- and
- forming a stress buffer region laterally between said first and second substrate sections so as to mechanically and resiliently connect said first and second substrate sections to one another.
Dependencies are inferred from the claim text.