Chip package and method for forming the same
OwnerYu-Lung Huang, Yu-Ting Huanginventors
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Abstract
According to an embodiment, a chip package is provided, which includes: a substrate having a first surface and a second surface; a device region formed in the substrate; a passivation layer formed overlying the first surface of the substrate; at least a polymer planarization layer formed overlying the passivation layer; a package substrate disposed overlying the first surface of the substrate; and a spacer layer disposed between the package substrate and the passivation layer, wherein the spacer layer and the package substrate surround a cavity overlying the substrate, wherein the polymer planar layer does not extends to an outer edge of the spacer layer.
Claims12
A chip package, comprising:
- a substrate having a first surface and a second surface;
- a device region formed in the substrate;
- a passivation layer formed on the first surface of the substrate;
- at least a polymer planar layer formed on the passivation layer;
- a package substrate disposed on the first surface of the substrate;
- and
- a spacer layer disposed between the package substrate and the passivation layer, wherein the spacer layer and the package substrate surround a cavity on the substrate, wherein the polymer planar layer does not extends to an outer edge of the spacer layer.
Dependencies are inferred from the claim text.