Bipolar punch-through semiconductor device and method for manufacturing such a semiconductor device

A bipolar punch-through semiconductor device comprising:

• a semiconductor substrate, having at least a two-layer structure with layers of a first and a second conductivity type, a first main side, and a second main side, wherein one of the layers is a base layer of the first conductivity type,
• wherein the first main side is arranged opposite of the second main side,
• wherein a first electrical contact is arranged on the first main side,
• wherein a second electrical contact is arranged on the second main side,
• wherein a buffer layer of the first conductivity type is arranged on the base layer on the second main side, which buffer layer has a higher doping concentration than the base layer,
• wherein a first layer is arranged in the substrate between the buffer layer and the second electrical contact, the first layer having alternating regions including at least one first region of the first conductivity type and at least one second region of the second conductivity type, and
• wherein the second region is an activated region, which has a depth of at maximum 2 μm and a doping profile, which drops from a distance between 90% to 10% of the maximum doping concentration, to a distance within at most 1 μm.

A bipolar diode, comprising:

• a semiconductor substrate, having at least a two-layer structure with layers of a first and a second conductivity type, a first main side, and a second main side, wherein one of the layers is a base layer of the first conductivity type,
• wherein the first main side is arranged opposite of the second main side,
• wherein a first electrical contact is arranged on the first main side,
• wherein a second electrical contact is arranged on the second main side,
• wherein a buffer layer of the first conductivity type is arranged on the base layer on the second main side, which buffer layer has a higher doping concentration than the base layer,
• wherein a first layer is arranged in the substrate between the buffer layer and the second electrical contact, the first layer having alternating regions including at least one first region of the first conductivity type and at least one second region of the second conductivity type,
• wherein the second region is an activated region, which has a depth of at maximum 2 μm and a doping profile, which drops from a distance between 90% to 10% of the maximum doping concentration, to a distance within at most 1 μm,
• wherein at least one of the following geometrical rules is fulfilled:
• the total area of second regions is 1 to 25% of the total wafer area;
• the width of the first region is at least 50 μm;
• and
• the width of the second region is at least 5 μm.

An insulated gate bipolar transistor comprising:

• a semiconductor substrate, having at least a two-layer structure with layers of a first and a second conductivity type, a first main side, and a second main side, wherein one of the layers is a base layer of the first conductivity type,
• wherein the first main side is arranged opposite of the second main side,
• wherein a first electrical contact is arranged on the first main side,
• wherein a second electrical contact is arranged on the second main side,
• wherein a buffer layer of the first conductivity type is arranged on the base layer on the second main side, which buffer layer has a higher doping concentration than the base layer,
• wherein a first layer is arranged in the substrate between the buffer layer and the second electrical contact, the first layer having alternating regions including at least one first region of the first conductivity type and at least one second region of the second conductivity type, and
• wherein the second region is an activated region, which has a depth of at maximum 2 μm and a doping profile, which drops from a distance between 90% to 10% of the maximum doping concentration, to a distance within at most 1 μm, and
• wherein at least one of the following geometrical rules is fulfilled:
• the width of the second region is at least 50 μm;
• the width of the first region is at least 5 μm;
• and
• the total area of second regions is between 90 to 99% of the total wafer area in the case of the semiconductor device being an insulated gate bipolar transistor.

An insulated gate commutated thyristor, comprising:

• a semiconductor substrate, having at least a two-layer structure with layers of a first and a second conductivity type, a first main side, and a second main side, wherein one of the layers is a base layer of the first conductivity type,
• wherein the first main side is arranged opposite of the second main side,
• wherein a first electrical contact is arranged on the first main side,
• wherein a second electrical contact is arranged on the second main side,
• wherein a buffer layer of the first conductivity type is arranged on the base layer on the second main side, which buffer layer has a higher doping concentration than the base layer,
• wherein a first layer is arranged in the substrate between the buffer layer and the second electrical contact, the first layer having alternating regions including at least one first region of the first conductivity type and at least one second region of the second conductivity type, and
• wherein the second region is an activated region, which has a depth of at maximum 2 μm and a doping profile, which drops from a distance between 90% to 10% of the maximum doping concentration, to a distance within at most 1 μm, and
• wherein at least one of the following geometrical rules is fulfilled:
• the width of the second region is at least 50 μm;
• the width of the first region is at least 5 μm;
• and
• the total area of second regions is between 75 to 99% of the total substrate area in the case of the semiconductor device being an insulated gate commutated thyristor.