Semiconductor integrated circuit with metal gate
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYuan-Sheng Huang, Ming-Ching Chang, Chao-Cheng Chen
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Abstract
A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes providing a semiconductor substrate and forming a gate trench therein. The method also includes filling in the gate trench partially with a work-function (WF) metal stack, and filling in the remaining gate trench with a dummy-filling-material (DFM) over the WF metal stack. A sub-gate trench is formed by etching-back the WF metal stack in the gate trench, and is filled with an insulator cap to form an isolation region in the gate trench. The DFM is fully removed to from a MG-center trench (MGCT) in the gate trench, which is filled with a fill metal.
Claims20
A method for fabricating a semiconductor integrated circuit (IC), the method comprising:
- providing a semiconductor substrate having a gate trench;
- partially filling in the gate trench with a work-function (WF) metal stack;
- filling in the remaining gate trench with a dummy-filling-material (DFM) over the WF metal stack;
- forming a sub-gate-trench in the gate trench while retaining the DFM;
- filling the sub-gate-trench with an insulator capping layer to form an isolation region in the gate trench;
- fully removing the DFM to form a MG-center trench (MGCT) in the center of gate trench;
- and
- filling in the MGCT with a fill metal.
A semiconductor integrated circuit (IC), the IC comprising:
- a semiconductor substrate;
- a gate dielectric stack formed on the semiconductor substrate;
- a metal gate (MG) stack formed over the gate dielectric stack;
- wherein the MG stack has a center region surrounded by an edge region;
- a fill metal formed in an upper portion of the center region of the MG stack;
- an isolation region formed in the upper portion of edge region of the MG stack;
- and
- a work-function (WF) metal stack formed in lower portions of both the center and edge regions of the MG stack.
A method for fabricating a semiconductor integrated circuit (IC), the method comprising:
- providing a semiconductor substrate;
- forming a dummy gate on the semiconductor substrate;
- forming a sidewall spacer on the dummy gate;
- removing the dummy gate to form a gate trench;
- filling in the gate trench partially with a work-function (WF) metal stack;
- filling in the remaining gate trench with a dummy-filling-material (DFM) over the WF metal stack;
- forming a sub-gate-trench with a predetermined depth (d) around the DFM in the gate trench;
- filling in the sub-gate-trench with an insulator capping layer to form an isolation region in the gate trench;
- after the isolation region formation, fully removing the DFM from the gate trench to form a MG-center trench (MGCT) in the gate trench;
- filling in the MGCT with a fill metal;
- and
- etching-back the fill metal to a predetermined metal height (h).
Dependencies are inferred from the claim text.