Semiconductor memory device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsYasuyuki Takahashi, Toshihiko Saito
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Abstract
It is to provide a semiconductor memory device in which high voltage is not needed in writing, a defect is less likely to occur, the writing time is short, and data cannot be rewritten without an increase in cost. The semiconductor memory device includes a memory element which includes a diode-connected first transistor, a second transistor whose gate is connected to one terminal of a source electrode and a drain electrode of the diode-connected first transistor, and a capacitor connected to the one terminal of the source electrode and the drain electrode of the diode-connected first transistor and the gate of the second transistor.
Claims12
A semiconductor memory device comprising:
- a memory element including a first transistor, a second transistor, and a capacitor;
- and
- a readout circuit;
- wherein a gate of the first transistor is electrically connected to one of a source and a drain of the first transistor,
- wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor,
- wherein the first transistor includes an oxide semiconductor film,
- wherein a first electrode of the capacitor is electrically connected to the gate of the second transistor, and
- wherein one of a source and a drain of the second transistor is electrically connected to the readout circuit.
A semiconductor memory device comprising:
- a first wiring;
- a second wiring;
- a third wiring;
- a fourth wiring;
- and
- a memory element including a first transistor, a second transistor, a third transistor, and a capacitor,
- wherein a gate of the first transistor is electrically connected to one of a source and a drain of the first transistor,
- wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor,
- wherein one of a source and a drain of the second transistor is electrically connected to the first wiring,
- wherein one of a source and a drain of the third transistor is electrically connected to the gate of the first transistor,
- wherein the other of the source and the drain of the third transistor is electrically connected to the second wiring,
- wherein a gate of the third transistor is electrically connected to the third wiring,
- wherein a first electrode of the capacitor is electrically connected to the gate of the second transistor,
- wherein a second electrode of the capacitor is electrically connected to the fourth wiring, and
- wherein the first transistor includes an oxide semiconductor film.
Dependencies are inferred from the claim text.