Lateral uniformity in silicon recess etch
AssigneeTexas Instruments Incorporated
InventorsDavid Gerald Farber, Tom Lii
Life of this patent
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Abstract
A method of etching recesses into silicon prior to formation of embedded silicon alloy source/drain regions. The recess etch includes a plasma etch component, using an etch chemistry of a primary fluorine-based or chlorine-based etchant, in combination with a similar concentration of hydrogen bromide. The concentration of both the primary etchant and the hydrogen bromide is relatively low; a diluent of an inert gas or oxygen is added to the reactive species. Loading effects on the undercut of the recess etch are greatly reduced, resulting in reduced transistor performance variation.
Claims17
A method of fabricating an integrated circuit at a silicon surface of a substrate, comprising the steps of:
- forming isolation dielectric structures at selected locations of the surface, the isolation dielectric structures defining active regions of the silicon surface therebetween;
- forming gate electrode structures overlying selected locations of active regions of the silicon surface;
- etching recesses into a plurality of the active regions at locations adjacent to the gate electrode structures, and undercutting edges of the adjacent gate electrode structures, by a sequence of steps comprising:
- providing a source gas comprised of the mixture of a primary reactant species, the primary reactant species selected from the group consisting of fluorine-based reactants and chlorine-based reactants, with a diluent gas and with hydrogen bromine gas, the hydrogen bromine gas having a flow rate about the same as a flow rate of the primary reactant species;
- and
- exciting the source gas with RF energy to create a plasma;
- and
- exposing the silicon surface to the excited source gas;
- and
- then epitaxially forming a silicon alloy in the recesses.
A method of fabricating an integrated circuit at a silicon surface of a substrate, comprising the steps of:
- forming isolation dielectric structures at selected locations of the surface, the isolation dielectric structures defining active regions of the silicon surface therebetween;
- forming gate electrode structures overlying selected locations of active regions of the silicon surface;
- etching recesses into a plurality of the active regions at locations adjacent to the gate electrode structures by a sequence of steps comprising:
- providing a source gas comprised of the mixture of a primary reactant species, the primary reactant species selected from the group consisting of fluorine-based reactants and chlorine-based reactants, with a diluent gas and with hydrogen bromine gas, the hydrogen bromine gas having a low flow rate about the same as a low flow rate of the primary reactant species so that an etchant reaction is etchant-starved;
- exciting the source gas with RF energy to create a plasma;
- and
- exposing the silicon surface to the excited source gas;
- and
- then epitaxially forming a silicon alloy in the recesses.
A method of fabricating an integrated circuit at a silicon surface of a substrate, comprising the steps of:
- forming isolation dielectric structures at selected locations of the surface, the isolation dielectric structures defining active regions of the silicon surface therebetween;
- forming gate electrode structures overlying selected locations of active regions of the silicon surface;
- etching recesses into a plurality of the active regions at locations adjacent to the gate electrode structures by a sequence of steps comprising:
- performing a break-through anisotropic plasma etch;
- performing an isotropic plasma etch by:
- providing a source gas comprised of the mixture of a primary reactant species, the primary reactant species selected from the group consisting of fluorine-based reactants and chlorine-based reactants, with a diluent gas and with hydrogen bromine gas, the hydrogen bromine gas having a low flow rate about the same as a low flow rate of the primary reactant species so that an etchant reaction is etchant-starved;
- exciting the source gas with RF energy to create a plasma;
- and
- exposing the silicon surface to the excited source gas;
- and
- after the isotropic plasma etch, performing a crystallographic wet etch of the silicon surface;
- and
- then epitaxially forming a silicon alloy in the recesses.
Dependencies are inferred from the claim text.