Methods of forming contact openings and methods of increasing contact area in only one of X and Y axes in the fabrication of integrated circuitry

A method of forming contact openings in the fabrication of integrated circuitry, comprising:

• forming a mask comprising at least one of photoresist and amorphous carbon over a plurality of spaced conductive line constructions, the conductive line constructions comprising insulative caps and insulative sidewalls, the mask comprising a plurality of spaced lines and trench spaces between adjacent of the spaced lines, the spaced lines and the trench spaces angling relative to the conductive line constructions, the spaced lines individually being of a constant lateral width along at least a majority of their length, said constant lateral width being of at least two different values for different of the spaced lines among the plurality of spaced lines, the trench spaces being received over node locations received between adjacent of the conductive line constructions;
• treating the at least one of photoresist and amorphous carbon with a plasma to reduce said constant lateral width of wider of the spaced lines by a larger amount than any reducing of said constant lateral width of narrower of the spaced lines;
• and
• after the treating, etching contact openings to the node locations selectively relative to the insulative caps and the insulative sidewalls.

A method of increasing conductive plug contact area in only one of X and Y axes in the fabrication of integrated circuitry, comprising:

• forming a plurality of conductive line constructions oriented along one of X and Y axes, the conductive line constructions comprising insulative caps and insulative sidewalls;
• forming a mask comprising a plurality of spaced lines and trench spaces between adjacent of the spaced lines over and which run orthogonally relative to the conductive line constructions in the other of the X and Y axes, the trench spaces being received over node locations received between adjacent of the conductive line constructions;
• reducing lateral width of the spaced lines in a direction parallel to the conductive line constructions which is along the one of X and Y axes by treating the spaced lines with a plasma, the plasma comprising chemically inert and chemically reactive components to said spaced lines, the reducing of lateral width of the spaced lines occurring by greater physical removal than by chemical removal of said spaced lines;
• and
• using the spaced lines of reduced lateral width as masking in one or more etchings of contact openings through insulative material to the node locations in a self-aligning manner to the insulative caps and the insulative sidewalls of the conductive line constructions.

A method of forming plugged contact openings in the fabrication of integrated circuitry, comprising:

• depositing photoresist over an antireflective coating which is received over a material to be etched, the material to be etched being received over a plurality of spaced conductive line constructions, the conductive line constructions comprising insulative caps and insulative sidewalls;
• patterning the photoresist to form a mask comprising a plurality of spaced lines and trench spaces between adjacent of the spaced lines, the spaced lines and the trench spaces angling relative to the conductive line constructions, the trench spaces extending to the antireflective coating and being received over node locations received between adjacent of the conductive line constructions;
• treating the photoresist with a plasma to reduce lateral width of the spaced lines and to increase lateral width of the trench spaces, the plasma comprising chemically inert and chemically reactive components to said photoresist, the reducing of lateral width of the spaced lines occurring by greater physical removal than by chemical removal of said photoresist;
• after the treating, etching contact openings through the antireflective coating and the material to be etched to the node locations selectively relative to the insulative caps and the insulative sidewalls;
• and
• forming conductive material within the contact openings in electrical connection with the node locations.

A method of forming contact openings in the fabrication of integrated circuitry, comprising:

• forming a mask over a plurality of spaced conductive line constructions, the conductive line constructions comprising insulative caps and insulative sidewalls, the mask comprising a plurality of spaced lines and trench spaces between adjacent of the spaced lines, the spaced lines and the trench spaces angling relative to the conductive line constructions, the trench spaces being received over node locations received between adjacent of the conductive line constructions;
• treating the spaced lines with a plasma to reduce lateral width of the spaced lines and to increase lateral width of the trench spaces, the plasma comprising chemically inert and chemically reactive components to said spaced lines, the reducing of lateral width of the spaced lines occurring by greater physical removal than by chemical removal of said spaced lines;
• and
• after the treating, etching contact openings to the node locations selectively relative to the insulative caps and the insulative sidewalls.

A method of forming contact openings in the fabrication of integrated circuitry, comprising:

• forming a mask over a plurality of spaced conductive line constructions, the conductive line constructions comprising insulative caps and insulative sidewalls, the mask comprising a plurality of spaced lines and trench spaces between adjacent of the spaced lines, the spaced lines and the trench spaces angling relative to the conductive line constructions, the spaced lines individually being of a constant lateral width along at least a majority of their length, said constant lateral width being of at least two different values for different of the spaced lines among the plurality of spaced lines, the trench spaces being received over node locations received between adjacent of the conductive line constructions;
• treating the spaced lines with a plasma to reduce said constant lateral width of the wider of the spaced lines by a larger amount than any reducing of said constant lateral width of the narrower of the spaced lines;
• and
• after the treating, etching contact openings to the node locations selectively relative to the insulative caps and the insulative sidewalls.