Thin film transistor array panel and method for manufacturing the same
AssigneeSamsung Display Co., Ltd.
InventorHong-Sick Park
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Abstract
The present invention provides a thin film transistor array panel including an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer formed on the gate line, a drain electrode and a data line having a source electrode formed on the gate insulating layer wherein the drain electrode faces the source electrode with a gap therebetween, and a pixel electrode connected to the drain electrode. At least one of the gate line, the data line, and the drain electrode includes a first conductive layer made of a conductive oxide and a second conductive layer of Ag that is deposited adjacent to the first conductive layer.
Claims20
A manufacturing method of a thin film transistor array panel comprising:
- forming a gate line having a gate electrode on an insulating substrate;
- sequentially depositing a gate insulating layer and a semiconductor layer on the gate line;
- forming a drain electrode and a data line having a source electrode on the gate insulating layer and the semiconductor layer, the drain electrode facing the source electrode with a gap between the drain electrode and the source electrode;
- and
- forming a pixel electrode connected to the drain electrode,
- wherein at least one step of the forming the gate line and the forming the data line and the drain electrode comprises depositing a first conductive oxide layer at a temperature less than 150° C., and depositing a second conductive layer of an Ag-containing conductor on the first conductive oxide layer.
Dependencies are inferred from the claim text.