Output common mode voltage stabilizer over large common mode input range in a high speed differential amplifier
AssigneeSTMicroelectronics International N.V.
InventorsTapas Nandy, Surendra Kumar
Life of this patent
Estimating the term…
Abstract
A circuit includes a differential amplifier having a folded cascode architecture with a pair of cascode transistors. A sensing circuit senses a common mode input voltage of a differential input signal applied to the differential amplifier. A bias generator circuit generates a bias voltage for application to the pair of cascode transistors in the folded cascode architecture. The bias generator circuit is connected to an output of the sensing circuit such that the generated bias voltage has a value which is dependent on the sensed common mode input voltage. This dependence stabilizes a common mode output voltage from the differential amplifier in response to changes in the common mode input voltage.
Claims20
A circuit, comprising:
- a differential input stage including a first input transistor configured to receive a first input signal, a second input transistor configured to receive a second input signal and a first tail current source coupled to supply a first current to the first and second input transistors at a first common connection node, said differential input stage having a pair of outputs;
- a pair of cascode transistors having conduction terminals respectively coupled to the pair of outputs of the differential input stage;
- a replica differential input stage including a third input transistor configured to receive said first input signal, a fourth input transistor configured to receive said second input signal and a second tail current source coupled to supply a second current to the third and fourth input transistors at a second common connection node, the third and fourth input transistors having a third common connection node configured to output a third current;
- and
- a bias generator circuit adapted to generate a bias voltage for application to control nodes of the pair of cascode transistors which is dependent on the third current.
A circuit, comprising:
- a differential input stage including a first input transistor configured to receive a first input signal, a second input transistor configured to receive a second input signal and a first tail current source coupled to supply a first current to the first and second input transistors at a first common connection node, said differential input stage having a pair of outputs;
- wherein the first and second input signals are differential signals having an input common mode voltage;
- a pair of cascode transistors having first conduction terminals respectively coupled to the pair of outputs of the differential input stage and having second conduction terminals configured to respectively generate first and second output signals;
- wherein the first and second output signals are differential signals having an output common mode voltage;
- a sensing circuit coupled to receive the first and second input signals, sense the common mode input voltage and generate a second current modulated as a function of the sensed common mode input voltage;
- and
- a bias generator circuit configured to generate a bias voltage as a function of the second current and apply said bias voltage to control terminals of the pair of cascode transistors.
A method, comprising:
- sensing common mode input voltage of a differential input signal;
- generating a first current modulated as a function of the sensed common mode input voltage;
- amplifying the differential input signal in a differential amplifier having a folded cascode architecture including a pair of cascode transistors to generate a differential output signal having a common mode output voltage;
- generating a bias voltage for application to the pair of cascode transistors in the folded cascode architecture;
- and
- modulating the bias voltage as a function of the first current.
Dependencies are inferred from the claim text.