Field effect transistor devices having thick gate dielectric layers and thin gate dielectric layers

A method for fabricating a semiconductor device, the method comprising:

• forming a fin on a substrate;
• forming a first gate stack over a portion of the fin;
• forming a dummy gate stack over a portion of the fin;
• growing an epitaxial material from exposed portions of the fin to define source and drain regions;
• forming a silicide material on exposed portions of the epitaxial material;
• forming a layer of dielectric material over the silicide material, the first gate stack, and the dummy gate stack;
• performing a planarizing process that removes portions of the layer of dielectric material, the first gate stack, and the dummy gate stack;
• pattering a first mask over portions of the layer of dielectric material and the dummy gate stack;
• forming a silicide material on exposed portions of the first gate stack;
• removing the first mask;
• pattering a second mask over portions of the layer of dielectric material and the first gate stack;
• removing a polysilicon portion of the dummy gate stack to define a cavity;
• removing the second mask;
• and
• forming a second gate stack in the cavity.

A method for fabricating a semiconductor device, the method comprising:

• forming a fin on a substrate;
• forming a first gate stack over a portion of the fin;
• forming a dummy gate stack over a portion of the fin;
• growing an epitaxial material from exposed portions of the fin to define source and drain regions;
• forming a layer of dielectric material over the epitaxial material, the first gate stack, and the dummy gate stack;
• performing a planarizing process that removes portions of the layer of dielectric material, the first gate stack, and the dummy gate stack;
• pattering a first mask over portions of the layer of dielectric material and the dummy gate stack;
• forming a silicide material on exposed portions of the first gate stack;
• removing the first mask;
• pattering a second mask over portions of the layer of dielectric material and the first gate stack;
• removing a polysilicon portion of the dummy gate stack to define a cavity;
• removing the second mask;
• and
• forming a second gate stack in the cavity.