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US 8,479,176 B2Granted
Register mapping techniques for efficient dynamic binary translation
AssigneeIntel Corporation
InventorsGuilherme D. Ottoni, Hong Wang, Wei Li
Life of this patent
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Abstract
Generally, the present disclosure provides a system and method for mapping registers from a system with more registers to a system with fewer registers. Regions may be formed that include one or more blocks of code with relatively frequent register accesses. The most frequently accessed source registers may be mapped to target registers. Each block in the region may be bounded by a prologue and at least one epilogue. The prologue may be configured to implement register mapping and the epilogue(s) may be configured to manage program flow from a block in the region to another block in the region or to a block not in the region.
Claims21
A method, comprising:
- loading a source binary application comprising a plurality of source binary code blocks for execution by a computer system, the computer system comprising memory and a processing unit comprising Nt target registers, wherein the source binary application is configured to be executed in an environment having Ns source registers wherein Nt is less than Ns;
- identifying, during runtime of said source binary application, a frequently executed source binary code block within said source binary application;
- defining a region comprising said frequently executed source binary code block and at least one neighboring source binary code block that exceeds an affinity threshold, the frequently executed source binary code block and the at least one neighboring source binary code block both include instructions to access at least one source register in common, and the frequently executed source binary code block and the at least one neighboring source binary code block are each bounded by a branch instruction;
- determining a frequency of access for each source register accessed in the region;
- and mapping each of N (N is greater than zero) most frequently accessed source registers in the region to a respective one of the Nt target registers wherein N is less than or equal to Nt.
2 more elements
An article, comprising a non-transitory tangible storage medium having instructions stored thereon which when executed by a processor result in the following operations comprising:
- loading a source binary application comprising a plurality of source binary code blocks for execution, wherein the processor comprises Nt target registers, wherein the source binary application is configured to be executed in an environment having Ns source registers wherein Nt is less than Ns;
- identifying, during runtime of said source binary application, a frequently executed source binary code block within said source binary application;
- defining a region comprising said frequently executed source binary code block and at least one neighboring source binary code block that exceeds an affinity threshold wherein affinity corresponds to a correlation in likelihood of execution of the frequently executed source binary code block and the at least one neighboring source binary code block, the frequently executed source binary code block and the at least one neighboring source binary code block both include instructions to access at least one source register in common and the frequently executed source binary code block and the at least one neighboring source binary code block are each bounded by a branch instruction;
- determining a frequency of access for each source register accessed in the region;
- and
- mapping each of N (N is greater than zero) most frequently accessed source registers in the region to a respective one of the Nt target registers wherein N is less than or equal to Nt.
3 more elements
A system, comprising:
- a processor comprising Nt target registers;
- and
- a memory configured to store a dynamic binary translator, a register mapping module and a source binary application configured to be executed in an environment having N s source registers wherein Nt is less than Ns, the source binary application comprising a plurality of source binary code blocks to be executed on the processor, wherein when the dynamic binary translator and register mapping module are executed on the processor at least one of the dynamic binary translator and register mapping module cause the processor to:
- identify, during runtime of said source binary application, a frequently executed source binary code block within said source binary application;
- define a region comprising said frequently executed source binary code block and at least one neighboring source binary code block that exceeds an affinity threshold, the frequently executed source binary code block and the at least one neighboring source binary code block both include instructions to access at least one source register in common, and the frequently executed source binary code block and the at least one neighboring source binary code block are each bounded by a branch instruction;
- determine a frequency of access for each source register accessed in the region;
- and
- map each of N (N is greater than zero) most frequently accessed source registers in the region to a respective one of the Nt target registers wherein N is less than or equal to Nt.
5 more elements
Dependencies are inferred from the claim text.