Method and apparatus for the design and analysis of digital circuits with time division multiplexing

A data processing system for designing a digital circuit, the data processing system comprising:

• means for determining a number of time slots allocated for a connection in an asynchronous Time Division Multiplexing (TDM) channel to address a timing requirement based on a propagation delay due to the connection,
• wherein the number of allocated time slots is related to a plurality of input lines of the asynchronous TDM channel assigned to the connection.

A non-transitory computer readable storage medium storing executable computer program instructions which when executed by a computer, cause said computer system to perform a method for designing a digital circuit, the method comprising:

• determining a number of time slots allocated for one of a plurality of connections in an asynchronous Time Division Multiplexing (TDM) channel by allocating additional time slots to the connection to reduce a propagation delay on the connection caused by the asynchronous TDM channel,
• wherein the number of allocated time slots is related to a plurality of input lines of the asynchronous TDM channel assigned to the connection, and
• wherein the determining is performed on a representation of circuit design, the representation being stored in a memory of the computer system which includes a processor which performs the determining.

A digital circuit on a chip, the digital circuit comprising:

• an asynchronous Time Division Multiplexing (TDM) channel connecting at least two regions on the chip, the asynchronous TDM channel comprising a plurality of connections, wherein one or more time slots are allocated to one of the plurality of connections in the asynchronous TDM channel to address a timing requirement based on a propagation delay due to the connection,
• wherein the number of allocated time slots is related to a plurality of input lines of the asynchronous TDM channel assigned to the connection.