Controller for disk array device, data transfer device, and method of power recovery process

A data transfer device for restoring data stored in a nonvolatile memory at a time of occurrence of a power failure, in a cache memory, upon recovery from the power failure, comprising:

• a reading unit configured to read, from the nonvolatile memory configured to include a plurality of access ports and have cache data written therein which was stored in the cache memory at the time of occurrence of the power failure, the cache data in units of a predetermined data transfer size, and write the cache data back in the cache memory;
• an erasing unit configured to erase data stored in the nonvolatile memory;
• and
• a control unit configured to be operable when recovery from the power failure is detected, to perform a power recovery process in which said control unit specifies different ones of said access ports for said reading unit and said erasing unit, respectively, thereby causing said reading unit and said erasing unit to operate in parallel,
• wherein during the power recovery process, said control unit sets the predetermined data transfer size as appropriate according to a state of occurrence of an error during data transfer by said reading unit, such that the cache data is restored in the cache memory.

A method of a power recovery process for restoring data stored in a nonvolatile memory at a time of occurrence of a power failure, in a cache memory, upon recovery from the power failure, comprising:

• outputting, when recovery from the power failure is detected, a read instruction for reading, from the nonvolatile memory including a plurality of access ports and having cache data written therein which was stored in the cache memory at the time of occurrence of the power failure, the cache data in units of a predetermined data transfer size, by specifying one of the access ports, and an erase instruction for erasing the nonvolatile memory, by specifying another of the access ports;
• reading the cache data stored in the nonvolatile memory, based on the read instruction, in units of the predetermined data transfer size, using the one of the access ports specified in the read instruction, and writing the cache data back in the cache memory;
• erasing an area of the nonvolatile memory in parallel with said reading, based on the erase instruction, using the another of the access ports specified in the erase instruction;
• and
• setting the data transfer size as appropriate according to a state of occurrence of an error in data transfer by said reading.