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US 8,479,014 B1Granted
Symmetric key based secure microprocessor and its applications
OwnerGuoan Huinventor
Life of this patent
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Abstract
An embodiment of the present invention proposes a new secure microprocessor for software protection. The invention presents a secure microprocessor, which embeds a symmetric encryption/decryption hardware a symmetric key (Embedded Key), and a safe cache. The symmetric encryption/decryption is the same for all microprocessors, but the Embedded Key is unique for each microprocessor.
Claims8
A method of enhancing a microprocessor which comprises a register-file and a first cache, comprising the steps of:
- embedding a symmetric encryption/decryption hardware into the microprocessor;
- embedding a symmetric key into the microprocessor for the encryption/decryption hardware, which is configured to be known only to a manufacturer of the microprocessor;
- embedding a second cache into the microprocessor, which is configured to be inaccessible from outside of the microprocessor, and unable to write-back or write-through to a memory outside of the microprocessor;
- adding an address translation table, which translates addresses of the first cache to addresses of the second cache;
- and
- adding a key selector which is configured to select from the symmetric key and an output of the symmetric encryption/decryption hardware;
- wherein when fetching an encrypted program from the memory, the encrypted program is decrypted using the symmetric encryption/decryption hardware and stored in the first cache after decryption, and then written to the second cache from the first cache using the address translation table, and garbage instructions are set to an area of the first cache such that when writing-back or writing-through to the memory, the garbage instructions in the area of the first cache are written to the memory.
4 more elements
A method of enhancing a microprocessor which comprises a register-file and a first cache, comprising the steps of:
- embedding a symmetric encryption/decryption hardware into the microprocessor;
- embedding a symmetric key into the microprocessor for the encryption/decryption hardware, which is configured to be known only to a manufacturer of the microprocessor;
- embedding a second cache into the microprocessor, which is configured to be inaccessible from outside of the microprocessor, and unable to write-back or write-through to a memory outside of the microprocessor;
- adding an address translation table, which translates addresses of the first cache to addresses of the second cache;
- and
- adding a “begin secure mode” instruction and an “end secure mode” instruction to an encrypted program;
- adding a key register to the microprocessor which is configured to be inaccessible from outside of the microprocessor;
- wherein when executing instructions between the “begin secure mode” instruction and the “end secure mode” instruction, the microprocessor does the following:
- fetching an encrypted key from the encrypted program;
- decrypting the encrypted key using the symmetric key and the symmetric encryption/decryption hardware embedded within the microprocessor to obtain a decrypted key, and storing the decrypted key in the second cache or in the key register;
- and
- decrypting instructions between the “begin secure mode” instruction and the “end secure mode” instruction using the decrypted key and the symmetric encryption/decryption hardware embedded within the microprocessor to obtain decrypted instructions, storing the decrypted instructions to the second cache, and setting a corresponding area of the first cache to garbage instructions.
9 more elements
Dependencies are inferred from the claim text.