Data storage device and information processing system incorporating data storage device
AssigneeSamsung Electronics Co., Ltd.
InventorsTae Hack Lee, Sang Kyoo Jeong, Myung Hyun Jo, Chan Ik Park
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Abstract
A data storage device comprises a plurality of memory devices and a memory controller. The memory controller exchanges data with the memory devices via a plurality of channels. The memory controller decodes an external command to generate a driving power mode and accesses the memory devices according to the driving power mode.
Claims9
A storage device operating under the control of a host, the storage device, comprising:
- a plurality of memory devices;
- and
- a memory controller that exchanges data with the memory devices via a plurality of channels, decodes a command received from the host to determine a driving power mode, activates at least two activated channels among the plurality of channels according to the driving power in order to access the memory devices, and adjusts a degree of interleaving between the at least two activated channels according to the driving power mode.
A data storage device operating under control of a host, the storage device comprising:
- a plurality of memory devices;
- and
- a memory controller that receives from a basic input/output system (BIOS) of the host a vendor specific command indicating a driving power mode that controls configuration of the memory devices, such that the memory controller exchanges data with the memory devices via a plurality of channels according to the command and the command adjusts at least one of a degree of interleaving among the plurality of channels, and a number of activated channels among the plurality of channels.
A data storage device operating under control of a host, the storage device comprising:
- a plurality of memory devices;
- and
- a memory controller that receives from a basic input/output system (BIOS) of the host a vendor specific command indicating a driving power mode that controls configuration of the memory devices, such that the memory controller exchanges data with the memory devices via a plurality of channels according to the command and the command adjusts a degree of interleaving among the plurality of channels.
Dependencies are inferred from the claim text.