Co-processing acceleration method, apparatus, and system

A co-processing acceleration method, comprising:

• receiving a co-processing request message sent by a compute node in a computer system, wherein the co-processing request message carries address information of to-be-processed data, and the to-be-processed data is data on which processing is requested by the compute node;
• according to the address information which is of the to-be-processed data and carried in the co-processing request message, obtaining the to-be-processed data, and storing the to-be-processed data in a public buffer card, wherein the to-be-processed data is data on which processing is requested by the co-processing request message;
• and
• allocating the to-be-processed data stored in the public buffer card to an idle co-processor card in the computer system for processing.

A co-processing task management apparatus, comprising:

• a message receiving module, configured to receive a co-processing request message sent by a compute node in a computer system, wherein the co-processing request message carries address information of to-be-processed data, and the to-be-processed data is data on which processing is requested by the compute node;
• a first data transfer module, configured to, according to the address information which is of the to-be-processed data and carried in the co-processing request message, obtain the to-be-processed data, and store the to-be-processed data in a public buffer card, wherein the to-be-processed data is data on which processing is requested by the co-processing request message;
• and
• a second data transfer module, configured to allocate the to-be-processed data stored in the public buffer card to an idle co-processor card in the computer system for processing.

An acceleration management board, comprising:

• a controller;
• and
• a PCIE interface unit, wherein
• the controller is coupled in data connection to a bus exchanger of a computer system through the PCIE interface unit,
• the controller is configured to
• receive a co-processing request message sent by a central processing unit CPU of the computer system, the co-processing request message carrying address information of to-be-processed data, and the to-be-processed data is data on which processing is requested by the CPU,
• according to the address information which is of the to-be-processed data and carried in the co-processing request message, obtain the to-be-processed data from a hard disk in the computer system,
• store the to-be-processed data in a public buffer unit, and
• allocate the to-be-processed data stored in the public buffer unit to an idle GPU acceleration card in the computer system for processing, and
• the GPU acceleration card is connected, through its own first PCIE interface, to the bus exchanger of the computer system.