Enhanced host sleep for WLAN devices

A wireless device assembly configured to communicate wirelessly with one or more other devices, the wireless device assembly comprising:

• a first interface to communicate with a host assembly;
• a second interface to communicate with the host assembly;
• a memory;
• and
• a processor coupled to the memory;
• wherein the memory stores instructions, which when executed by a processor, cause the processor to
• process a first signal received from the host assembly via the first interface, wherein the first signal indicates a request for the wireless device assembly to enter a host sleep mode of operation, wherein while the wireless device assembly is in the host sleep mode of operation, the wireless device assembly can initiate communication with the host assembly via the first interface only after receiving a second signal via the second interface, wherein the second signal indicates a request to exit the host sleep mode of operation,
• in response to the first signal, transmit, via the first interface, a third signal to the host assembly, wherein the third signal indicates entry of the wireless device assembly into the host sleep mode of operation,
• after transmitting the third signal, cause the wireless device assembly to enter the host sleep mode of operation,
• during the host sleep mode of operation, process the second signal received from the host assembly via the second interface,
• transmit, via the first interface, a fourth signal to the host assembly, wherein the fourth signal is responsive to the second signal, and
• cause the wireless device assembly to exit the host sleep mode of operation in response to receiving a fifth signal from the host assembly, wherein the fifth signal is responsive to the fourth signal.

A method implemented in host assembly communicatively coupled to a wireless device assembly (i) via a first interface and (ii) via a second interface, the method comprising:

• transmitting, from the host assembly to the wireless device assembly, a first signal, wherein the first signal indicates a request for the wireless device assembly to enter a host sleep mode of operation, wherein while the wireless device assembly is in the host sleep mode of operation, the wireless device assembly can initiate communication with the host assembly via the first interface only after receiving a second signal via the second interface, wherein the second signal indicates a request to exit the host sleep mode of operation;
• in response to the first signal, receiving, via the first interface, a third signal from the wireless device assembly, wherein the third signal indicates entry of the wireless device assembly into the host sleep mode of operation;
• in response to receiving the third signal, blocking access by the wireless device assembly to a bus of the host assembly;
• during the host sleep mode of operation, transmitting, via the second interface, the second signal to the wireless device assembly;
• receiving, via the first interface, a fourth signal from the wireless device assembly wherein the fourth signal is responsive to the second signal;
• and
• after receiving the fourth signal, allowing access by the wireless device assembly to the bus of the host assembly.

A host assembly, comprising:

• a first interface to communicate with a wireless device assembly;
• a second interface to communicate with the wireless device assembly;
• a bus coupled to the first interface;
• a memory;
• and
• a processor coupled to the memory;
• wherein the memory stores instructions, which when executed by a processor, cause the processor to
• transmit a first signal to the wireless device assembly, wherein the first signal indicates a request to enter a host sleep mode of operation, wherein while the wireless device assembly is in the host sleep mode of operation, the wireless device assembly can initiate communication with the host assembly via the first interface only after receiving a second signal via the second interface, wherein the second signal indicates a request to exit the host sleep mode of operation,
• process a third signal received, via the first interface, from the wireless device assembly, wherein the third signal is responsive to the first signal and indicates entry of the wireless device assembly into the host sleep mode of operation,
• in response to receiving the third signal, block access by the wireless device assembly to the bus,
• during the mode of operation, transmit the second signal to the wireless device assembly via the second interface,
• process a fourth signal received from the wireless device assembly via the first interface, wherein the fourth signal is responsive to the second signal, and
• after receiving the fourth signal, allow access by the wireless device assembly to the bus.