Bit slip circuitry for serial data signals
AssigneeAltera Corporation
InventorRichard Yen-Hsiang Chang
Life of this patent
Estimating the term…
Abstract
Circuitry for use in aligning bytes in a serial data signal (e.g., with deserializer circuitry that operates in part in response to a byte rate clock signal) includes a multistage shift register for shifting the serial data signal through a number of stages at least equal to (and in many cases, preferably more than) the number of bits in a byte. The output signal of any shift register stage can be selected as the output of this “bit slipping” circuitry so that any number of bits over a fairly wide range can be “slipped” to produce or help produce appropriately aligned bytes. The disclosed bit slipping circuitry is alternatively or additionally usable in helping to align (“deskew”) two or more serial data signals that are received via separate communication channels.
Claims20
Bit slip circuitry comprising:
- multistage shift register circuitry through which a serial data input signal is shifted;
- state machine circuitry for selecting which one stage of the shift register circuitry provides a serial data output signal of the bit slip circuitry;
- multiplexer circuitry for receiving a plurality of signals from the state machine circuitry corresponding to the selection of the one stage of the shift register circuitry;
- and
- circuitry for applying a clock signal to an input of the state machine circuitry.
Bit slip circuitry comprising:
- multistage shift register circuitry through which a serial data input signal is shifted;
- circuitry for controllably selecting an output signal of any one of the stages of the shift register circuitry for use as a serial data output signal of the bit slip circuitry, wherein the circuitry for controllably selecting comprises multiplexer circuitry for receiving a plurality of signals corresponding to the selection the output signal of the any one of the stages of the shift register circuitry;
- circuitry for applying a clock signal to the circuitry for controllably selecting;
- and
- deserializer circuitry having a serial side to which the serial data output signal is applied.
A method of performing a controllable bit slip operation on a serial data input signal comprising:
- shifting the serial data input signal through multistage shift register circuitry;
- selecting an output signal of one stage of the shift register circuitry as a serial data output signal;
- applying the serial data output signal to a serial side of deserializer circuitry;
- and
- changing the stage of the shift register circuitry selected in the selecting until the deserializer circuitry is outputting aligned bytes of data.
Dependencies are inferred from the claim text.