System and method for bi-phase modulation decoding

A method for decoding a bi-phase modulated signal, wherein each bit-window of the bi-phase modulated signal represents a single logic bit with each bit-window beginning with a logic transition, having a first logic state represented by substantially constant logic state through the bit-window and a second logic state represented by additional logic state transition in the approximate center of the bit-window, the method comprising:

• receiving the bi-phase modulated signal via a transmission medium;
• converting the bi-phase modulated signal from an analog form to a digital form comprising a plurality of consecutive digital samples;
• generating a first dot product of the plurality of consecutive digital samples and a respective plurality of tap weights of a first finite impulse response (FIR) filter associated with the first logic state;
• generating a second dot product of the plurality of consecutive digital samples and a respective plurality of tap weights of a second FIR filter associated with the second logic state;
• comparing an absolute value of the first dot product and an absolute value of the second dot product in a comparator receiving the first and second dot products;
• generating an output code as a bit having the first logic state upon the absolute value of the first dot product being greater than the absolute value of the second dot product and having the second logic state upon the absolute value of the second dot product being greater than the absolute value of the first dot product;
• and programming the plurality of tap weights of the first filter to have a range of values that are greater than or equal to a reference value;
• programming the plurality of tap weights of the second filter to have a first range of values corresponding to consecutive digital samples of the bi-phase modulated signal that are greater than the reference value and a second range of values corresponding to consecutive digital samples of the bi-phase modulated signal that are less than the reference value;
• and normalizing the plurality of tap weights of each of the first and second FIR filters.

A wireless power system comprising:

• a portable electronic device comprising a transmitter configured to modulate a bi-phase communication signal, wherein each bit-window of the bi-phase modulated signal represents a single logic bit with each bit-window beginning with a logic transition, having a first logic state represented by substantially constant logic state through the bit-window and a second logic state represented by additional logic state transition in the approximate center of the bit-window, onto a secondary current associated with a secondary inductor;
• a wireless charger comprising a receiver configured to monitor a primary current associated with a primary inductor, the primary inductor and secondary inductor collectively forming an isolation transformer configured to transfer energy from the primary inductor to the secondary inductor to charge a rechargeable battery in the portable electronic device, the receiver comprising a decoder comprising:
• at least one first finite impulse response (FIR) filter associated with the first logic state that are each configured to generate a first dot product of a plurality of consecutive digital samples of the bi-phase modulated signal associated with the primary current and tap weights associated with a distinct plurality of taps associated with each respective one of the at least one first FIR filter;
• at least one second FIR filter associated with the second logic state that are each configured to generate a second dot product of the plurality of consecutive digital samples of the bi-phase modulated signal associated with the primary current and tap weights associated with a distinct plurality of taps associated with each respective one of the at least one second FIR filter;
• a comparator connected to receive the first and second dot products and configured to compare the dot products associated with each of the at least one first FIR filter and the at least one second FIR filter to provide the output code as a bit having one of the first logic state and the second logic state based on the comparison, wherein the tap weights of the at least one first FIR filter comprises a range of values that are greater than or equal to a reference value, and wherein the tap weights of the at least one second FIR filter comprises a first range of values corresponding to a first portion of a plurality of consecutive digital samples of the bi-phase modulated signal that are greater than the reference value and a second range of values corresponding to a second portion of the plurality of consecutive digital samples of the bi-phase modulated signal that are less than the reference value, the tap weights of each of the at least one first and the at least one second FIR filters being normalized.