Processing packet information using an array of processing elements
AssigneeAlcatel Lucent
InventorRobert J. Schultz
Life of this patent
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Abstract
Processing packet information using an array of processing elements involves performing search-independent processing on packet information in parallel with a search of a first stage memory unit and then using the processed information and the result from the search of the first stage memory unit to generate search information for a search of a second stage memory unit. The search-independent processing of packet information in parallel with search operations can be repeated at each stage of the array. By performing search-independent processing of packet information in parallel with search operations instead of serially, latency that is contributed from the relatively slow search operations is reduced.
Claims3
A system for processing packet information comprising:
- an array of processing elements having;
- at least one first stage processing element;
- and
- at least one second stage processing element;
- and
- a first stage memory unit that is searched in response to search information from the first stage processing element;
- wherein the first and second stage processing elements are configured to allow the second stage processing element to perform search-independent processing related to a packet in parallel with a search of the first stage memory unit, where the search is related to the same packet;
- wherein the second stage processing element is further configured to perform search-dependent processing using a result of the search of the first stage memory unit and a result from the search-independent processing to produce a search key;
- further including a second stage memory unit that is associated with the second stage processing element, wherein the search key is used to search the second stage memory unit;
- and
- further including at least one third stage processing element, wherein the second and third stage processing elements are configured to allow the third stage processing element to perform search-independent processing related to the packet in parallel with the search of the second stage memory unit.
Dependencies are inferred from the claim text.