Strict-sense minimal spanning switch non-blocking architecture
AssigneeAltera Canada Co.
InventorWally Haas
Life of this patent
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Abstract
The present invention discloses an apparatus to implement a m=n Non-Blocking Minimal Spanning Switch, where n=the total number of data input signals and m=the total number of data output signals and m=the number of crossbar connections in each switch. Data is input to the switch as a plurality of frames, whereby each crossbar connection contains a framer which detects framing patterns in the data. Skewed data is re-aligned and buffered so that the data output by each crossbar connection is equal and identical, thus any crossbar connection may be used to ensure a connection, eliminating the possibility of data interrupts.
Claims16
Switching circuitry comprising:
- a plurality of cross-bar circuitries, wherein:
- each cross-bar circuitry of the plurality cross-bar circuitries is configured to receive a same plurality of data input signals, and
- each cross-bar circuitry of the plurality of cross-bar circuitries comprises:
- a plurality of alignment circuitries, wherein each alignment circuitry of the plurality of alignment circuitries is configured to:
- determine a start of frame signal associated with the received plurality of data input signals, and
- align each respective data input signal of the received plurality of data input signals based on the determined start of frame signal;
- and
- selection circuitry configured to select, for output by the each cross-bar circuitry, an aligned data input signal of a plurality of aligned data input signals output by the plurality of alignment circuitries.
A method comprising:
- receiving, with each cross-bar circuitry of a plurality of cross-bar circuitries, a same plurality of data input signals,
- determining, with a plurality of alignment circuitries, a start of frame signal associated with the received plurality of data input signals,
- aligning, with the plurality of alignment circuitries of the each cross-bar circuitry, each respective data input signal of the received plurality of data input signals based on the determined start of frame signal;
- selecting, with a selection circuitry of the each cross-bar circuitry, an aligned data input signal of a plurality of aligned data input signals output by the plurality of alignment circuitries, wherein the each cross-bar circuitry is configured to output the selected aligned data input signal.
Switching circuitry comprising:
- a plurality of cross-bar circuitries, wherein each cross-bar circuitry of the plurality of cross-bar circuitries comprises:
- a plurality of buffer circuitries;
- a plurality of framer circuitries, wherein each framer circuitry of the plurality of framer circuitries is configured to:
- determine a start of frame signal of a respective data input signal of a same plurality of data input signals received by the each framer circuitry of the plurality of framer circuitries;
- and
- write the respective data input signal into data locations within a respective buffer circuitry of the plurality of buffer circuitries, wherein the data locations are determined based on the determined start of frame signal;
- and
- selection circuitry configured to select, for output by the each cross-bar circuitry of the plurality of the plurality of cross-bar circuitries, an data signal output by a buffer circuitry of the plurality of buffer circuitries.
Dependencies are inferred from the claim text.