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US 8,477,548 B2Granted
Semiconductor device equipped with a plurality of memory banks and test method of the semiconductor device
AssigneeElpida Memory, Inc.
InventorKenji Mae
Life of this patent
Estimating the term…
Abstract
A write circuit writes a first data signal that is an input data signal that indicates a first logic level to each memory bank in sequence and writes a second data signal that is an input data signal that indicates a second logic level to each memory bank simultaneously.
Claims19
A semiconductor device comprising:
- a plurality of memory banks;
- and
- a write circuit that writes a first data signal that is an input data signal that indicates a first logic level to each memory bank in sequence and that simultaneously writes a second data signal that is an input data signal that indicates a second logic level to each memory bank.
A semiconductor device comprising:
- a plurality of phase-change memory banks;
- and
- a write circuit that writes an input data signal that indicates a first logic level to each memory bank in sequence in a reset operation and writes an input data signal that indicates a second logic level to each memory bank simultaneously in a set operation.
A semiconductor device comprising:
- a plurality of memory banks each including a plurality of memory cells;
- and
- a write circuit writing an input data in parallel to each of specified ones of the memory cells of each of the memory banks when the input data is in a first state, and writing the input data in sequence to the each of the specified ones of the memory cells of each of the memory banks when the input data is in a second state.
Dependencies are inferred from the claim text.