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US 8,477,545 B2Granted
Semiconductor apparatus
AssigneeSK hynix Inc.
InventorsSin Hyun Jin, Jong Chern Lee
Life of this patent
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Abstract
A semiconductor apparatus includes a plurality of stacked chips. At least two of the chips are configured to receive a column command and generate a column control signal based on the column command. Generation timing of the column control signal generated based on a column command in one of the at least two chips substantially coincide with the generation timing in the other of the at least two of the plurality of chips.
Claims11
A semiconductor apparatus comprising:
- a first chip column control unit disposed in a first chip and configured to variably delay an internal column command to generate a first chip column control signal;
- and
- a second chip column control unit disposed in a second chip and configured to variably delay the internal column command to generate a second chip column control signal,
- wherein the first chip column control unit comprises a first delay control section configured to count a first number of times that a clock signal toggles during a first time period and to generate a first calibration signal, and a first variable delay section configured to variably delay the internal column command in response to the first calibration signal and to generate the first chip column control signal, and
- wherein the first delay control section comprises a first ring oscillator configured to generate an enable signal which is enabled during the first time period, and a first counting part configured to count the first number of times that the clock signal toggles in response to the enable signal and to generate the first calibration signal.
2 more elements
Dependencies are inferred from the claim text.