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US 8,477,526 B2Granted
Low noise memory array
OwnerRobert Newton Rountreeinventor
Life of this patent
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Abstract
A memory array compatible with dynamic random access memories (DRAM) and static random access memories (SRAM) is disclosed. The memory array includes a first sense amplifier (700) having a first bit line (754) extending in a first direction and a second bit line (752) extending in a second direction parallel to the first bit line. A second sense amplifier (704) has a third bit line (756) adjacent and parallel to the first bit line. The third bit line remains inactive while the first bit line is active.
Claims20
A memory array, comprising:
- a first sense amplifier having a first bit line extending in a first direction and a second bit line extending in a second direction different from the first direction and parallel to the first bit line;
- a second sense amplifier having a third bit line adjacent and parallel to the first bit line, wherein the third bit line remains inactive while the first bit line is active;
- a plurality of word lines extending in a third direction perpendicular to the first direction and forming cross points with the first and third bit lines;
- and
- a plurality of memory cells, each memory cell respectively connected to a word line and a bit line of each cross point.
2 more elements
A static random access memory (SRAM) array, comprising:
- a first sense amplifier coupled to a first bit line extending in a first direction and a second bit line extending in the first direction;
- a first plurality of SRAM cells, each SRAM cell of the first plurality coupled to the first and second bit lines;
- and
- a second sense amplifier coupled to a third bit line adjacent and parallel to the first and second bit lines, wherein the third bit line remains inactive while the first and second bit lines are active.
1 more element
A memory array, comprising:
- a first sense amplifier having a first bit line extending in a first direction and a second bit line extending in a second direction different from the first direction;
- a second sense amplifier having a third bit line adjacent and parallel to the first bit line and a fourth bit line adjacent and parallel to the first bit line;
- and
- a plurality of word lines extending in a third direction perpendicular to the first direction and forming cross points with the first and third bit lines, wherein a respective memory cell is connected to a word line and a bit line of each cross point.
1 more element
Dependencies are inferred from the claim text.