Nonvolatile memory devices and related methods and systems

A method of reading in a nonvolatile memory device, the nonvolatile memory device including a memory cell array having a plurality of stacked memory layers each having a first conductive line having a first direction, a second conductive line having a second direction intersecting the first direction, and a memory cell at an intersection between the first conductive line and the second conductive line, and sharing one of the first and second conductive line, but not both, with an adjacent memory layer, the method of reading comprising:

• selecting a first memory layer;
• applying a first voltage to a first conductive line of the selected first memory layer;
• applying a second voltage to a second conductive line of the selected first memory layer;
• and
• applying the second voltage to a first conductive line of a second memory layer sharing the second conductive line with the selected first memory layer,
• wherein the memory layers are stacked along a third direction intersecting the first and second directions.

A memory system comprising:

• a nonvolatile memory device;
• and
• a controller configured to control the nonvolatile memory device,
• wherein the nonvolatile memory device comprises:
• a memory cell array including a plurality of stacked memory layers each having a first conductive line having a first direction, a second conductive line having a second direction, different from and intersecting the first direction, and a memory cell at the intersection between the first conductive line and the second conductive line, and sharing one of the first and second conductive lines, but not both, with an adjacent memory layer;
• a first selection circuit configured to apply a first voltage to a first conductive line of a selected first memory layer and apply a second voltage to a first conductive line of a second memory layer sharing the second conductive line with the selected first memory layer;
• and
• a second selection circuit configured to apply the second voltage to a second conductive line of the selected first memory layer,
• wherein the memory layers are stacked along a third direction intersecting the first and second directions.