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US 8,477,521 B2Granted
Fuse circuit and memory device including the same
AssigneeHynix Semiconductor Inc.
InventorsKwi-Dong Kim, Jun-Gi Choi
Life of this patent
Estimating the term…
Abstract
A fuse circuit includes a plurality of fuse cells, an amplification unit, and a plurality of registers. The amplification unit is configured to sequentially amplify data stored in the fuse cells. The registers are configured to sequentially store data amplified by the amplification unit.
Claims15
A fuse circuit comprising:
- a plurality of fuse cells to be enabled in response to a corresponding selection signal of a plurality of selection signals;
- a counter unit to count an oscillation wave and generate an address;
- a decoder unit to decode the address and generate the plurality of selection signals;
- an amplification unit to amplify data of an enabled fuse cell of the plurality of cells;
- and
- a plurality of registers to be enabled in response to the corresponding selection signal, and to store data amplified by the amplification unit.
3 more elements
A memory device comprising:
- a plurality of fuse cells configured to be enabled in response to a corresponding selection signal of a plurality of selection signals;
- a counter unit to count an oscillation wave and generate an address;
- a decoder unit to decode the address and generate the plurality of selection signals;
- an amplification unit to amplify data of an enabled fuse cell of the plurality of fuse cells;
- a bank region including a plurality of memory cells and a plurality of registers, each of the plurality of registers to be enabled in response to the corresponding selection signal, of the plurality of selection signals, and to store the data amplified by the amplification unit;
- and
- a plurality of address lines to transmit the address to the bank region.
4 more elements
Dependencies are inferred from the claim text.