Memory address re-mapping of graphics data

A computer comprising:

• detection circuitry to detect an entry to be created by an application launched in a first virtual machine on a virtual machine monitor (VMM);
• lookup circuitry to combine data or an offset from the entry to be created with data or an offset from an entry to be created by the VMM to create an entry of a single level lookup table to convert a guest address to a host address;
• a graphics chipset in a virtualized environment with a graphics virtual machine and the VMM, the graphics chipset comprising a memory controller circuitry to store the entry to be created by an application in a first memory address translation table in a main memory, to store the entry to be created by the VMM stored in a second memory address translation table in the main memory, and to store the entry of the single level lookup table in the main memory;
• and
• graphics device circuitry or graphics controller circuitry to translate a guest address of a DMA requests in one of a graphics display engine and a graphics render engine to a host physical address (HPA) using the single level lookup table.

A computer comprising:

• detection circuitry to detect an entry to be created by an application launched in a first virtual machine on a virtual machine monitor (VMM);
• lookup circuitry to combine data or an offset from the entry to be created with data or an offset from an entry to be created by the VMM to create an entry of a single level lookup table to convert a guest address to a host address;
• and
• a graphics chipset in a virtualized environment with a graphics virtual machine and the VMM, the graphics chipset comprising a memory controller circuitry to store the entry to be created by an application in a first memory address translation table in a main memory, to store the entry to be created by the VMM stored in a second memory address translation table in the main memory, and to store the entry of the single level lookup table in the main memory, wherein the graphics chipset is one of an integrated graphics device and a discrete graphics controller to communicate with a graphics virtual machine to run on the VMM, without accessing the VMM, wherein the integrated graphics device or the discrete graphics controller does not access the VMM during graphics virtual machine execution, wherein the graphics virtual machine receives DMA request from a virtual application and sends the request to the chipset to be translated from a GPA into an HPA using the table.

A computer comprising:

• detection circuitry to detect an entry to be created by an application launched in a first virtual machine on a virtual machine monitor (VMM);
• lookup circuitry to combine data or an offset from the entry to be created with data or an offset from an entry to be created by the VMM to create an entry of a single level lookup table to convert a guest address to a host address;
• and
• memory controller circuitry to store the entry to be created by an application in a first memory address translation table in a main memory, to store the entry to be created by the VMM stored in a second memory address translation table in the main memory, and to store the entry of the single level lookup table in the main memory, wherein the memory controller circuitry is different than a graphics virtual machine;
• and wherein the application on the virtual machine sends graphics instructions including the DMA requests to the graphics virtual machine to use the memory controller circuitry.

A computer comprising:

• detection circuitry to detect an entry to be created by an application launched in a first virtual machine on a virtual machine monitor (VMM);
• lookup circuitry to combine data or an offset from the entry to be created with data or an offset from an entry to be created by the VMM to create an entry of a single level lookup table to convert a guest address to a host address;
• and
• a graphics chipset in a virtualized environment with a graphics virtual machine and the VMM, the graphics chipset comprising a memory controller circuitry to store the entry to be created by an application in a first memory address translation table in a main memory, to store the entry to be created by the VMM stored in a second memory address translation table in the main memory, and to store the entry of the single level lookup table in the main memory, wherein the graphics chipset is different than a graphics virtual machine;
• and wherein the application of a virtual machine sends graphics instructions including the DMA requests to the graphics virtual machine to use the graphics chipset.