Method and circuit for an operating area limiter
AssigneeAtmel Corporation
InventorsHendrik Santo, Dilip Sangam, Kien Vi, Ranajit Ghoman, Matthew D. Schindler
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Abstract
The present invention relates to circuits and methods for limiting the operating area of a transistor in a constant current source. The circuits and methods use a detector and a driver to limit the operating area of a transistor. The detector and driver have parameters selected so that, when the voltage at the drain of the transistor satisfies a reference condition, the driver causes drain current of the transistor to decrease. The reference condition is determined relative to the maximum safe drain-to-source voltage at the design drain current of the constant current source.
Claims20
A circuit for limiting an operating area of a transistor in a constant current source, the circuit comprising:
- a driver comprising a variable voltage source coupled to a first input of a first comparator included in the constant current source, the variable voltage source configured for providing a reference voltage to the constant current source, wherein a second input of the first comparator is directly coupled to a source of the transistor in the constant current source and an output of the first comparator is coupled to a gate of the transistor, the driver adapted to be controlled to decrease drain current at the transistor by decreasing the reference voltage provided to the constant current source;
- and
- a detector coupled to the constant current source and to the driver, the detector comprising:
- a constant voltage source coupled to a first input of a second comparator included in the detector and configured for providing a set voltage based on determining a safe operating area of the transistor;
- and
- the second comparator including the first input, a second input connected to a drain of the transistor of the constant current source, and an output coupled to the variable voltage source included in the driver, the second comparator being adapted to:
- compare the set voltage output from the constant voltage source with voltage at the drain of the transistor;
- and
- output a signal to control the variable voltage source to decrease the drain current at the transistor and, by controlling the variable voltage source to decrease the drain current, cause the transistor to operate in the safe operating area for the transistor, wherein the comparator is adapted to output the signal to control the variable voltage source in response to the voltage at the drain of the transistor exceeding the set voltage output from the constant voltage source.
A method for limiting an operating area of a transistor in a constant current source, the method comprising:
- determining a safe operating area of the transistor;
- configuring a constant voltage source included in a detector coupled to the constant current source for providing a set voltage based on determining the safe operating area of the transistor;
- detecting a voltage at a drain of the transistor;
- comparing, by a first comparator included in the detector, the voltage at the drain of the transistor to the set voltage at the constant voltage source, the first comparator including a first input coupled to the constant voltage source and a second input coupled to the drain of the transistor;
- determining whether the voltage at the drain of the transistor exceeds the set voltage based on the comparing;
- responsive to determining that the voltage at the drain of the transistor exceeds the set voltage, controlling a driver comprising a variable voltage source coupled to an output of the first comparator for reducing a reference voltage that is provided by the variable voltage source to a second comparator included in the constant current source;
- and
- based on reducing the reference voltage provided to the second comparator, decreasing the drain current at the transistor and causing the transistor to operate in the safe operating area for the transistor, wherein the drain current at the transistor is controlled by the second comparator, with an input of the second comparator directly coupled to a source of the transistor and an output of the second comparator coupled to a gate of the transistor.
Dependencies are inferred from the claim text.