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US 8,476,961 B2Granted
System and method of transistor switch biasing in a high power semiconductor switch
AssigneeSiGe Semiconductor Inc.
InventorsChun-Wen Paul Huang, Mark Doherty, Philip Michael Antognetti
Life of this patent
Estimating the term…
Abstract
A system and method are provided for biasing transistor switches in a semiconductor based high power switch. Off-state Vgsd biasing for the off transistor switches is based upon acceptable levels of spurious harmonic emissions and linearity.
Claims20
A switch circuit comprising:
- a first transistor switch;
- a second transistor switch;
- biasing circuitry including a first resistance and a second resistance and configured to receive a high control voltage and a low control voltage and to provide an on-state bias voltage to the first transistor switch and an off-state bias voltage to the second transistor switch, the on-state bias voltage being a difference between a product of the first resistance and the high control voltage and a product of the second resistance and the low control voltage, the off-state bias voltage being a difference between a product of the first resistance and the low control voltage and a product of the second resistance and the high control voltage, the off-state bias voltage having a magnitude that is different than a magnitude of the on-state bias voltage by an amount sufficient to yield at least one of a harmonic emission associated with the switch circuit that is less than a selected emission level and a linearity associated with the switch circuit that is greater than a selected linearity level.
A wireless device comprising:
- an antenna;
- a transmitter circuit;
- a receiver circuit;
- and
- a switching circuit that couples the transmitter circuit and the receiver circuit with the antenna so as to facilitate transmission and reception of wireless signals, the switching circuit including a first transistor switch, a second transistor switch, and biasing circuitry including a first resistance and a second resistance and configured to receive a high control voltage and a low control voltage and to provide an on-state bias voltage to the first transistor switch and an off-state bias voltage to the second transistor switch, the on-state bias voltage being a difference between a product of the first resistance and the high control voltage and a product of the second resistance and the low control voltage, the off-state bias voltage being a difference between a product of the first resistance and the low control voltage and a product of the second resistance and the high control voltage, the off-state bias voltage having a magnitude that is different than a magnitude of the on-state bias voltage by an amount sufficient to yield at least one of a harmonic emission associated with the switch circuit that is less than a selected emission level and a linearity associated with the switch circuit that is greater than a selected linearity level.
2 more elements
A method for biasing transistor switches, the method comprising:
- providing a difference between a product of a first resistance and a high control voltage and a product of a second resistance and a low control voltage as an on-state bias voltage to a first transistor switch;
- and
- providing a difference between a product of the first resistance and the low control voltage and a product of the second resistance and the high control voltage as an off-state bias voltage to a second transistor switch, the off-state bias voltage having a magnitude that is different than a magnitude of the on-state bias voltage by an amount sufficient to yield at least one of a harmonic emission that is less than a selected emission level and a linearity that is greater than a selected linearity level.
Dependencies are inferred from the claim text.