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US 8,476,949 B2Granted
Edge-triggered flip-flop design
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShine Chung, Kenneth Chiakun Weng, Pin-Lin Chiu
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Abstract
An edge triggered flip-flop circuit is disclosed with a clock signal, an input signal, a switch module using the clock signal for defining a data passing window, and a latch module for receiving the input signal during the data passing window.
Claims22
An edge triggered flip-flop circuit comprising:
- a clock node for receiving a clock signal;
- an input node for receiving an input signal;
- a switch module using the clock signal for defining a data passing window;
- and
- a latch module for receiving the input signal during the data passing window,
- wherein the switch module includes a pair of pass gates coupled in series between the input node and a data node of the latch module, the switch module further including a temporary storage device coupled to the pair of pass gates, a first one of the pass gates controlled by the clock signal and a second one of the pass gates controlled by an inverted clock signal, wherein the first pass gate is turned on to store the input signal to the temporary storage device and then the second pass gate is turned on to pass the stored input signal to the latch module, wherein the second pass gate shuts off at the end of the data passing window.
3 more elements
A dual edge triggering flip flop circuit comprising:
- a clock node for receiving a clock signal;
- an input node for receiving an input signal and a complementary input signal;
- a first switch module using the clock signal for defining a first data passing window upon a first edge of the clock signal;
- a latch module for storing the input signal during the first data passing window;
- and
- a second switch module coupled to the latch module for generating an output within a second data passing window upon a second edge of the clock signal,
- wherein each switch module includes:
- a first set of pass gates for receiving the input signal and the complementary input signal,
- a second set of pass gates coupled in series with the first set of pass gates in a master-slave configuration between the first set of pass gates and first and second data nodes of the latch module, and
- a pair of temporary storage devices coupled to the first set of pass gates and the second set of pass gates, wherein the first set of pass gates is turned on to store the input signal and complementary input signal to the pair of temporary storage devices and then the second set of pass gates is turned on to pass the stored signals to the latch module, wherein the second set of pass gates shuts off at the end of the first or second data passing window respectively.
7 more elements
An edge triggered flip-flop circuit comprising:
- a clock node for receiving a clock signal;
- an input node for receiving an input signal;
- a switch module using the clock signal for defining a data passing window;
- and
- a latch module for receiving the input signal during the data passing window,
- wherein the switch module further includes a pair of pass gates coupled in series between the input node and a data node of the latch module, the switch module further including a temporary storage device for storing the input signal, the pass gates being selectively controlled for storing the input signal to the temporary storage device and for creating the data passing window for passing the input signal to the latch module from the temporary storage device.
3 more elements
A dynamic edge-triggering circuit comprising:
- a switch circuit with a master pass gate and a slave pass gate connected in series for receiving an input signal;
- a first inverter for receiving the input signal passed from the switch circuit;
- and
- a capacitance device coupled to an output of the first inverter,
- wherein the switch module includes a storage device for storing the input signal after it passes the master pass gate,
- wherein the master and slave pass gates are selectively controlled for storing the input signal to the storage device and for creating a data passing window for passing the input signal to the first inverter from the storage device.
3 more elements
Dependencies are inferred from the claim text.