Stress reduced cascoded CMOS output driver circuit
AssigneeSTMicroelectronics International N.V.
InventorVinod Kumar
Life of this patent
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Abstract
An output driver circuit includes first, second, third, and fourth transistors having a common current path, wherein a gate of the first transistor receives a first switching signal, a gate of the second transistor receives a first reference voltage, a gate of the third transistor receives a second reference voltage, and a gate of the fourth transistor receives a second switching signal, and wherein a first capacitor is coupled between the gate of the first transistor and the gate of the third transistor, a second capacitor is coupled between the gate of the second transistor and the gate of the fourth transistor, and an output signal is provided at a node coupling the second and third transistors.
Claims26
An output driver circuit comprising:
- first, second, third, and fourth transistors having a common current path, wherein
- a gate of the first transistor receives a first switching signal,
- a gate of the second transistor receives a first reference voltage,
- a gate of the third transistor receives a second reference voltage, and
- a gate of the fourth transistor receives a second switching signal, and wherein
- a first capacitor is coupled between the gate of the first transistor and the gate of the third transistor,
- a second capacitor is coupled between the gate of the second transistor and the gate of the fourth transistor, and
- an output signal is provided at a node coupling the second and third transistors,
- wherein a current path of an additional transistor is interposed between the first reference voltage and the gate of the second transistor, and a gate of the additional transistor receives the first or second switching signal.
An output driver circuit comprising:
- first, second, third, and fourth transistors having a common current path, wherein
- a gate of the first transistor receives a first switching signal,
- a gate of the second transistor receives a first reference voltage,
- a gate of the third transistor receives a second reference voltage, and
- a gate of the fourth transistor receives a second switching signal, and wherein
- a first capacitor is coupled between the gate of the first transistor and the gate of the third transistor,
- a second capacitor is coupled between the gate of the second transistor and the gate of the fourth transistor, and
- an output signal is provided at a node coupling the second and third transistors,
- wherein a current path of an additional transistor is interposed between the second reference voltage and the gate of the third transistor, and a gate of the additional transistor receives the first or second switching signal.
An output driver circuit comprising:
- first, second, third, and fourth transistors having a common current path, wherein
- a gate of the first transistor receives a first switching signal,
- a gate of the second transistor receives a first reference voltage,
- a gate of the third transistor receives a second reference voltage, and
- a gate of the fourth transistor receives a second switching signal, and wherein
- a first capacitor is coupled between the gate of the first transistor and the gate of the third transistor,
- a second capacitor is coupled between the gate of the second transistor and the gate of the fourth transistor, and
- an output signal is provided at a node coupling the second and third transistors;
- and
- a fifth transistor in parallel with the first transistor.
Dependencies are inferred from the claim text.