Circuitry and method for differential signal detection with integrated reference voltage
AssigneeNational Semiconductor Corporation
InventorsArlo J. Aude, Soumya Chandramouli
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Abstract
Differential signal detection circuitry with an integrated reference voltage. The reference voltage is added as an offset to the output voltage, and its integration ensures that variations in the reference voltage closely track variations in the signal. Accordingly, the detection threshold for the signal being detected remains more consistent over variations in the circuit manufacturing process, power supply voltage and operating temperature.
Claims14
An apparatus including differential signal detection circuitry with an integrated reference voltage, comprising:
- current source circuitry to provide at least first and second bias currents, including:
- a first current source circuit coupled to said differential amplifier circuitry and responsive to a first bias voltage by providing said first bias current;
- and
- a second current source circuit coupled to said voltage follower circuitry and responsive to a second bias voltage by providing said second bias current;
- differential amplifier circuitry coupled to at least said current source circuitry and responsive to at least said first bias current and a differential input signal having a differential input signal magnitude by providing a reference voltage and a first differential output signal phase;
- and
- voltage follower circuitry coupled to at least said current source circuitry and responsive to at least said second bias current and a third bias voltage by providing a second differential output signal phase;
- wherein said first and second differential output signal phases form a differential output signal having a differential output signal magnitude related to a difference between said differential input signal magnitude and said reference voltage.
A method of detecting a differential signal detection circuitry with an integrated reference voltage comprising:
- generating at least first and second bias currents by:
- responding to a first bias voltage by generating said first bias current;
- and
- responding to a second bias voltage by generating said second bias current;
- responding to at least said first bias current and a differential input signal having a differential input signal magnitude by generating a reference voltage and a first differential output signal phase;
- and
- responding to at least said second bias current and a third bias voltage by generating a second differential output signal phase;
- wherein said first and second differential output signal phases form a differential output signal having a differential output signal magnitude related to a difference between said differential input signal magnitude and said reference voltage.
Dependencies are inferred from the claim text.