Programmable logic device

A programmable logic device comprising a look-up table comprising a memory element comprising:

• a first transistor comprising a first gate, a first source, and a first drain;
• a second transistor comprising a second gate, a second source, and a second drain;
• a third transistor comprising a third gate, a third source, and a third drain;
• a fourth transistor comprising a fourth gate, a fourth source, and a fourth drain;
• and
• a fifth transistor comprising a fifth gate, a fifth source, and a fifth drain,
• wherein the first transistor comprises an oxide semiconductor film,
• wherein the first gate is electrically connected to a word line,
• wherein one of the first source and the first drain is electrically connected a bit line,
• wherein the other of the first source and the first drain is electrically connected to the second gate and the third gate,
• wherein one of the second source and the second drain is electrically connected to one of the third source and the third drain, the fourth gate, and the fifth gate,
• wherein one of the fourth source and the fourth drain is electrically connected to one of the fifth source and the fifth drain, and an output terminal,
• wherein the other of the second source and the second drain is electrically connected to the other of the fourth source and the fourth drain, and
• wherein the other of the third source and the third drain is electrically connected to the other of the fifth source and the fifth drain.