Saving energy mode (SEM) for an interleaved power factor correction (PFC) converter

An interleaved power factor correction (PFC) converter comprising:

• a first power factor correction (PFC) sub-circuit;
• a second PFC sub-circuit connected in parallel with the first PFC sub-circuit;
• and
• a controller connected to monitor an output voltage of the PFC converter and an input voltage of the PFC converter, the controller generating an amplified error signal based on a monitored output voltage, the controller comparing the amplified error signal to a first threshold value and compares the input voltage to an input voltage threshold value to determine whether to enable or disable the second PFC sub-circuit, wherein the control selectively disables the second PFC sub-circuit when the amplified error signal decreases below the first threshold value and modifies the enabling and disabling of the second PFC sub-circuit based on the comparison of the monitored input voltage to the input voltage threshold value.

A controller for an interleaved power factor correction (PFC) converter having a first PFC sub-circuit and a second PFC sub-circuit interleaved with the first PFC sub-circuit, the controller comprising:

• an error amplifier circuit for generating an amplified output based on a difference between a monitored output voltage of the PFC converter and a reference voltage;
• a filter circuit for generating an amplified error signal based on the amplified output;
• a first comparator circuit for comparing the amplified error signal to a first threshold value;
• a second comparator circuit for comparing a monitored input voltage to an input voltage threshold value;
• and
• a control circuit for selectively enabling or disabling the second PFC sub-circuit based on outputs provided by the first comparator circuit and the second comparator circuit, wherein the control circuit prevents disabling of the second PFC sub-circuit in response to the monitored input voltage exceeding the voltage input threshold value.

A method of controlling an interleaved power factor correction (PFC) converter having a first PFC sub-circuit and a second PFC sub-circuit, the method comprising:

• generating an amplified error signal based on a monitored output voltage of the interleaved PFC converter;
• disabling the second PFC sub-circuit in response to the amplified error signal being less than a first threshold value;
• enabling the second PFC sub-circuit in response to the amplified error signal exceeding a second threshold value;
• and
• modifying the enabling and disabling of the second PFC sub-circuit by decreasing the first threshold value and the second threshold value in response to a monitored input voltage exceeding a third threshold value.

A controller for an interleaved power factor correction (PFC) converter having a first PFC sub-circuit and a second PFC sub-circuit interleaved with the first PFC sub-circuit, the controller comprising:

• an error amplifier circuit for generating an amplified output based on a difference between a monitored output voltage of the PFC converter and a reference voltage;
• a filter circuit for generating an amplified error signal based on the amplified output;
• a first comparator circuit for comparing the amplified error signal to a first threshold value;
• a second comparator circuit for comparing a monitored input voltage to an input voltage threshold value;
• and
• a control circuit for selectively enabling or disabling the second PFC sub-circuit based on outputs provided by the first comparator circuit and the second comparator circuit, wherein the control circuit decreases the first threshold value in response to the monitored input voltage exceeding the input voltage threshold value.