ESD protection device and method

A semiconductor device comprising:

• a semiconductor body of a first conductivity type;
• a doped drain region of a second conductivity type disposed at a surface of the semiconductor body, the second conductivity type opposite to the first conductivity type;
• a doped source region of the second conductivity type disposed at the surface of the semiconductor body and laterally spaced from the doped drain region by a channel region of the first conductivity type extending entirely from a first edge of the doped drain region to a second edge of the doped source region;
• a gate region of the second conductivity type insulatively overlying at least the entire channel region of the first conductivity type;
• a first region of the first conductivity type disposed directly adjacent to the gate region of the second conductivity type, wherein an entire interface between the first region of the first conductivity type and the gate region of the second conductivity type forms a first semiconductor junction, wherein no portion of the first semiconductor junction is disposed over the doped drain region, the doped source region, the channel region of the first conductivity type, the first edge, and the second edge, and wherein the first region of the first conductivity type and the gate region of the second conductivity type form a contiguous region;
• a signal pad disposed on the semiconductor body, wherein the signal pad is coupled to the doped drain region;
• and
• wherein the first region of the first conductivity type is coupled to the doped source region such that there is a direct current path between the doped source region and the gate region.